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[AArch64][SVE] Combine UXT[BHW] intrinsics to AND. #137956

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Merged
merged 7 commits into from
May 6, 2025
Merged

[AArch64][SVE] Combine UXT[BHW] intrinsics to AND. #137956

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ed0ee9a
Precommit tests.
rj-jesus Apr 30, 2025
a381043
[AArch64][SVE] Combine UXT[BHW] intrinsics to AND.
rj-jesus Apr 30, 2025
89ce3d8
Emit Intrinsic::aarch64_sve_and_u rather than stock and.
rj-jesus Apr 30, 2025
f0b3424
Simplify splat creation.
rj-jesus May 1, 2025
34f4dc0
Remove zeroing tests.
rj-jesus May 1, 2025
dcf54e2
Remove redundant tests.
rj-jesus May 1, 2025
ef535bf
Remove convert calls from tests.
rj-jesus May 1, 2025
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28 changes: 28 additions & 0 deletions llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2640,6 +2640,28 @@ static std::optional<Instruction *> instCombinePTrue(InstCombiner &IC,
return std::nullopt;
}

static std::optional<Instruction *> instCombineSVEUxt(InstCombiner &IC,
IntrinsicInst &II,
unsigned NumBits) {
Value *Passthru = II.getOperand(0);
Value *Pg = II.getOperand(1);
Value *Op = II.getOperand(2);

// Convert UXT[BHW] to AND.
if (isa<UndefValue>(Passthru) || isAllActivePredicate(Pg)) {
auto *Ty = cast<VectorType>(II.getType());
auto MaskValue = APInt::getLowBitsSet(Ty->getScalarSizeInBits(), NumBits);
auto *Mask = ConstantVector::getSplat(
Ty->getElementCount(),
ConstantInt::get(Ty->getElementType(), MaskValue));
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@paulwalker-arm paulwalker-arm May 1, 2025

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Suggested change
auto *Mask = ConstantVector::getSplat(
Ty->getElementCount(),
ConstantInt::get(Ty->getElementType(), MaskValue));
auto *Mask = ConstantInt::get(Ty, MaskValue);

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@rj-jesus rj-jesus May 1, 2025

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Ups, thanks - done.

auto *And = IC.Builder.CreateIntrinsic(Intrinsic::aarch64_sve_and_u, {Ty},
{Pg, Op, Mask});
return IC.replaceInstUsesWith(II, And);
}

return std::nullopt;
}

std::optional<Instruction *>
AArch64TTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
Expand Down Expand Up @@ -2745,6 +2767,12 @@ AArch64TTIImpl::instCombineIntrinsic(InstCombiner &IC,
return instCombineSVEInsr(IC, II);
case Intrinsic::aarch64_sve_ptrue:
return instCombinePTrue(IC, II);
case Intrinsic::aarch64_sve_uxtb:
return instCombineSVEUxt(IC, II, 8);
case Intrinsic::aarch64_sve_uxth:
return instCombineSVEUxt(IC, II, 16);
case Intrinsic::aarch64_sve_uxtw:
return instCombineSVEUxt(IC, II, 32);
}

return std::nullopt;
Expand Down
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