[GISel] Fix ShuffleVector assert #139769
Merged
[GISel] Fix ShuffleVector assert #139769
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
lialan
force-pushed
the
lialan/fix_g_shuffle_vector
branch
from
f98edcf to
1704d82
Compare
Member
|
@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-amdgpu Author: Alan Li (lialan) ChangesFixes issue: #139752 When G_SHUFFLE_VECTOR has only 1 element then it is possible the vector is decayed into a scalar. Full diff: https://github.com/llvm/llvm-project/pull/139769.diff 2 Files Affected:
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 5191360c7718a..3abed4d062bfa 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -420,8 +420,12 @@ void CombinerHelper::applyCombineShuffleToBuildVector(MachineInstr &MI) const {
else
Extracts.push_back(Unmerge2.getReg(Val - Width));
}
-
- Builder.buildBuildVector(MI.getOperand(0).getReg(), Extracts);
+ assert(Extracts.size() > 0 && "Expected at least one element in the shuffle");
+ if (Extracts.size() == 1) {
+ Builder.buildCopy(MI.getOperand(0).getReg(), Extracts[0]);
+ } else {
+ Builder.buildBuildVector(MI.getOperand(0).getReg(), Extracts);
+ }
MI.eraseFromParent();
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
index bba608cceee19..e500cfe085110 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
@@ -135,3 +135,27 @@ body: |
SI_RETURN
...
+
+---
+name: shuffle_vector_to_copy
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+ ; CHECK-LABEL: name: shuffle_vector_to_copy
+ ; CHECK: liveins: $vgpr0, $vgpr1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr1
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[COPY]](p3) :: (load (<8 x s16>), align 8, addrspace 3)
+ ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[LOAD]](<8 x s16>)
+ ; CHECK-NEXT: G_STORE [[UV4]](s16), [[COPY1]](p3) :: (store (s16), addrspace 3)
+ ; CHECK-NEXT: SI_RETURN
+ %0:_(p3) = COPY $vgpr0
+ %1:_(p3) = COPY $vgpr1
+ %12:_(<8 x s16>) = G_IMPLICIT_DEF
+ %10:_(<8 x s16>) = G_LOAD %0(p3) :: (load (<8 x s16>), align 8, addrspace 3)
+ %11:_(s16) = G_SHUFFLE_VECTOR %10(<8 x s16>), %12, shufflemask(4)
+ G_STORE %11(s16), %1(p3) :: (store (s16), addrspace 3)
+ SI_RETURN
+...
|
arsenm
reviewed
May 14, 2025
Contributor
arsenm
left a comment
arsenm
left a comment
There was a problem hiding this comment.
Should also include end to end IR test
llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
Outdated
Show resolved
Hide resolved
| %1:_(p3) = COPY $vgpr1 | ||
| %12:_(<8 x s16>) = G_IMPLICIT_DEF | ||
| %10:_(<8 x s16>) = G_LOAD %0(p3) :: (load (<8 x s16>), align 8, addrspace 3) | ||
| %11:_(s16) = G_SHUFFLE_VECTOR %10(<8 x s16>), %12, shufflemask(4) |
Contributor
There was a problem hiding this comment.
Should we even permit this in the MIR verifier? What produced this shuffle?
Member
Author
There was a problem hiding this comment.
It is actually emitted by this GIsel rule: combine_shuffle_disjoint_mask.
Contributor
There was a problem hiding this comment.
that should probably directly turn this into an extract element
shiltian
approved these changes
May 20, 2025
Comment on lines
424
to
428
Contributor
There was a problem hiding this comment.
Suggested change
| if (Extracts.size() == 1) { | |
| Builder.buildCopy(MI.getOperand(0).getReg(), Extracts[0]); | |
| } else { | |
| Builder.buildBuildVector(MI.getOperand(0).getReg(), Extracts); | |
| } | |
| if (Extracts.size() == 1) | |
| Builder.buildCopy(MI.getOperand(0).getReg(), Extracts[0]); | |
| else | |
| Builder.buildBuildVector(MI.getOperand(0).getReg(), Extracts); |
krzysz00
reviewed
May 20, 2025
Contributor
krzysz00
left a comment
krzysz00
left a comment
There was a problem hiding this comment.
Seems reasonable to me, though I can't definitively say this is fine
Fixes issue: llvm#139752 When G_SHUFFLE_VECTOR has only 1 element then it is possible the vector is decayed into a scalar.
lialan
force-pushed
the
lialan/fix_g_shuffle_vector
branch
from
3ed3648 to
3fbc4e5
Compare
Collaborator
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/88/builds/11852 Here is the relevant piece of the build log for the reference |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
6 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Fixes issue: #139752
When G_SHUFFLE_VECTOR has only 1 element then it is possible the vector is decayed into a scalar.