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[llvm] Use llvm::is_sorted (NFC) #140399

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Merged
merged 1 commit into from
May 17, 2025
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[llvm] Use llvm::is_sorted (NFC) #140399

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3 changes: 1 addition & 2 deletions llvm/lib/CodeGen/MachineScheduler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4917,8 +4917,7 @@ unsigned ResourceSegments::getFirstAvailableAt(
unsigned CurrCycle, unsigned AcquireAtCycle, unsigned ReleaseAtCycle,
std::function<ResourceSegments::IntervalTy(unsigned, unsigned, unsigned)>
IntervalBuilder) const {
assert(std::is_sorted(std::begin(_Intervals), std::end(_Intervals),
sortIntervals) &&
assert(llvm::is_sorted(_Intervals, sortIntervals) &&
"Cannot execute on an un-sorted set of intervals.");

// Zero resource usage is allowed by TargetSchedule.td but we do not construct
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11 changes: 6 additions & 5 deletions llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
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Expand Up @@ -1748,11 +1748,12 @@ static void assignSlotsUsingVGPRBlocks(MachineFunction &MF,
MachineFrameInfo &MFI = MF.getFrameInfo();
const SIRegisterInfo *TRI = ST.getRegisterInfo();

assert(std::is_sorted(CSI.begin(), CSI.end(),
[](const CalleeSavedInfo &A, const CalleeSavedInfo &B) {
return A.getReg() < B.getReg();
}) &&
"Callee saved registers not sorted");
assert(
llvm::is_sorted(CSI,
[](const CalleeSavedInfo &A, const CalleeSavedInfo &B) {
return A.getReg() < B.getReg();
}) &&
"Callee saved registers not sorted");

auto CanUseBlockOps = [&](const CalleeSavedInfo &CSI) {
return !CSI.isSpilledToReg() &&
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