[AMDGPU] Add make.buffer.rsrc to InferAddressSpaces #140770
Merged
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
make.buffer.rsrc can be subjected to address space inference. There's not _currently_ a reason to have this, but we might as well handle this in case it comes up.
Member
|
@llvm/pr-subscribers-backend-amdgpu Author: Krzysztof Drewniak (krzysz00) Changesmake.buffer.rsrc can be subjected to address space inference. There's not currently a reason to have this, but we might as well handle this in case it comes up. Full diff: https://github.com/llvm/llvm-project/pull/140770.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index 05e1aa02d2703..86a6e49fce027 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1044,6 +1044,7 @@ bool GCNTTIImpl::collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
case Intrinsic::amdgcn_flat_atomic_fmax_num:
case Intrinsic::amdgcn_flat_atomic_fmin_num:
case Intrinsic::amdgcn_load_to_lds:
+ case Intrinsic::amdgcn_make_buffer_rsrc:
OpIndexes.push_back(0);
return true;
default:
@@ -1124,6 +1125,16 @@ Value *GCNTTIImpl::rewriteIntrinsicWithAddressSpace(IntrinsicInst *II,
II->setCalledFunction(NewDecl);
return II;
}
+ case Intrinsic::amdgcn_make_buffer_rsrc: {
+ Type *SrcTy = NewV->getType();
+ Type *DstTy = II->getType();
+ Module *M = II->getModule();
+ Function *NewDecl = Intrinsic::getOrInsertDeclaration(
+ M, II->getIntrinsicID(), {DstTy, SrcTy});
+ II->setArgOperand(0, NewV);
+ II->setCalledFunction(NewDecl);
+ return II;
+ }
default:
return nullptr;
}
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
index 9f67859a3f147..d6e79dafc9fcd 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
@@ -192,6 +192,20 @@ define amdgpu_kernel void @load_to_lds_fat_pointer_as_flat(ptr addrspace(7) %buf
ret void
}
+define amdgpu_kernel void @make_buffer_rsrc_global_as_flat(ptr addrspace(1) %global, i32 %extent) {
+ ;; NOTE: flags value not representative of real input
+; CHECK-LABEL: define amdgpu_kernel void @make_buffer_rsrc_global_as_flat(
+; CHECK-SAME: ptr addrspace(1) [[GLOBAL:%.*]], i32 [[EXTENT:%.*]]) {
+; CHECK-NEXT: [[BUFFER_FAT_PTR:%.*]] = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) [[GLOBAL]], i16 0, i32 [[EXTENT]], i32 0)
+; CHECK-NEXT: store i32 [[EXTENT]], ptr addrspace(7) [[BUFFER_FAT_PTR]], align 4
+; CHECK-NEXT: ret void
+;
+ %cast = addrspacecast ptr addrspace(1) %global to ptr
+ %buffer.fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p9(ptr %cast, i16 0, i32 %extent, i32 0)
+ store i32 %extent, ptr addrspace(7) %buffer.fat.ptr
+ ret void
+}
+
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #1
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
@@ -199,6 +213,8 @@ declare void @llvm.memcpy.p0.p3.i32(ptr nocapture writeonly, ptr addrspace(3) no
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
declare void @llvm.amdgcn.load.to.lds.p0(ptr nocapture readonly, ptr addrspace(3) nocapture writeonly, i32 immarg, i32 immarg, i32 immarg) #1
+declare void @llvm.amdgcn.make.buffer.rsrc.p0(ptr nocapture readnone, i16, i32, i32) #0
+
attributes #0 = { nounwind }
attributes #1 = { argmemonly nounwind }
|
Member
|
@llvm/pr-subscribers-llvm-transforms Author: Krzysztof Drewniak (krzysz00) Changesmake.buffer.rsrc can be subjected to address space inference. There's not currently a reason to have this, but we might as well handle this in case it comes up. Full diff: https://github.com/llvm/llvm-project/pull/140770.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index 05e1aa02d2703..86a6e49fce027 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1044,6 +1044,7 @@ bool GCNTTIImpl::collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
case Intrinsic::amdgcn_flat_atomic_fmax_num:
case Intrinsic::amdgcn_flat_atomic_fmin_num:
case Intrinsic::amdgcn_load_to_lds:
+ case Intrinsic::amdgcn_make_buffer_rsrc:
OpIndexes.push_back(0);
return true;
default:
@@ -1124,6 +1125,16 @@ Value *GCNTTIImpl::rewriteIntrinsicWithAddressSpace(IntrinsicInst *II,
II->setCalledFunction(NewDecl);
return II;
}
+ case Intrinsic::amdgcn_make_buffer_rsrc: {
+ Type *SrcTy = NewV->getType();
+ Type *DstTy = II->getType();
+ Module *M = II->getModule();
+ Function *NewDecl = Intrinsic::getOrInsertDeclaration(
+ M, II->getIntrinsicID(), {DstTy, SrcTy});
+ II->setArgOperand(0, NewV);
+ II->setCalledFunction(NewDecl);
+ return II;
+ }
default:
return nullptr;
}
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
index 9f67859a3f147..d6e79dafc9fcd 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
@@ -192,6 +192,20 @@ define amdgpu_kernel void @load_to_lds_fat_pointer_as_flat(ptr addrspace(7) %buf
ret void
}
+define amdgpu_kernel void @make_buffer_rsrc_global_as_flat(ptr addrspace(1) %global, i32 %extent) {
+ ;; NOTE: flags value not representative of real input
+; CHECK-LABEL: define amdgpu_kernel void @make_buffer_rsrc_global_as_flat(
+; CHECK-SAME: ptr addrspace(1) [[GLOBAL:%.*]], i32 [[EXTENT:%.*]]) {
+; CHECK-NEXT: [[BUFFER_FAT_PTR:%.*]] = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) [[GLOBAL]], i16 0, i32 [[EXTENT]], i32 0)
+; CHECK-NEXT: store i32 [[EXTENT]], ptr addrspace(7) [[BUFFER_FAT_PTR]], align 4
+; CHECK-NEXT: ret void
+;
+ %cast = addrspacecast ptr addrspace(1) %global to ptr
+ %buffer.fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p9(ptr %cast, i16 0, i32 %extent, i32 0)
+ store i32 %extent, ptr addrspace(7) %buffer.fat.ptr
+ ret void
+}
+
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #1
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
@@ -199,6 +213,8 @@ declare void @llvm.memcpy.p0.p3.i32(ptr nocapture writeonly, ptr addrspace(3) no
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
declare void @llvm.amdgcn.load.to.lds.p0(ptr nocapture readonly, ptr addrspace(3) nocapture writeonly, i32 immarg, i32 immarg, i32 immarg) #1
+declare void @llvm.amdgcn.make.buffer.rsrc.p0(ptr nocapture readnone, i16, i32, i32) #0
+
attributes #0 = { nounwind }
attributes #1 = { argmemonly nounwind }
|
arsenm
reviewed
May 20, 2025
| Function *NewDecl = Intrinsic::getOrInsertDeclaration( | ||
| M, II->getIntrinsicID(), {DstTy, SrcTy}); | ||
| II->setArgOperand(0, NewV); | ||
| II->setCalledFunction(NewDecl); |
Contributor
There was a problem hiding this comment.
Not sure this readjusts the call's type correctly but I guess it must work
llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
Outdated
Show resolved
Hide resolved
llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
Outdated
Show resolved
Hide resolved
Co-authored-by: Matt Arsenault <[email protected]>
arsenm
approved these changes
May 20, 2025
| store i32 %extent, ptr addrspace(7) %buffer.fat.ptr | ||
| ret void | ||
| } | ||
|
|
Contributor
Author
There was a problem hiding this comment.
Last I checked, make.duffer.rsrc doesn't support vectors
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
3 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
make.buffer.rsrc can be subjected to address space inference. There's not currently a reason to have this, but we might as well handle this in case it comes up.