Skip to content

[VPlan] Use InstSimplifyFolder in IRBuilder #141225

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
artagnon wants to merge 2 commits into from
Closed

[VPlan] Use InstSimplifyFolder in IRBuilder #141225

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
edc410b
[VPlan] Use InstSimplifyFolder in IRBuilder
artagnon May 23, 2025
d78fb23
[LV] Bad test update; abort
artagnon May 23, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 8 additions & 4 deletions llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -488,8 +488,9 @@ class InnerLoopVectorizer {
: OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI),
AC(AC), ORE(ORE), VF(VecWidth),
MinProfitableTripCount(MinProfitableTripCount), UF(UnrollFactor),
Builder(PSE.getSE()->getContext()), Cost(CM), BFI(BFI), PSI(PSI),
RTChecks(RTChecks), Plan(Plan),
Folder(PSE.getSE()->getDataLayout()),
Builder(PSE.getSE()->getContext(), Folder), Cost(CM), BFI(BFI),
PSI(PSI), RTChecks(RTChecks), Plan(Plan),
VectorPHVPB(Plan.getEntry()->getSingleSuccessor()) {}

virtual ~InnerLoopVectorizer() = default;
Expand Down Expand Up @@ -597,8 +598,11 @@ class InnerLoopVectorizer {
/// many different vector instructions.
unsigned UF;

/// The builder that we use
IRBuilder<> Builder;
/// The folder that we use for the builder.
InstSimplifyFolder Folder;

/// The builder that we use.
IRBuilder<InstSimplifyFolder> Builder;

// --- Vectorization state ---

Expand Down
34 changes: 21 additions & 13 deletions llvm/lib/Transforms/Vectorize/VPlan.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -775,29 +775,37 @@ class VPRecipeWithIRFlags : public VPSingleDefRecipe {
void applyFlags(Instruction &I) const {
switch (OpType) {
case OperationType::OverflowingBinOp:
I.setHasNoUnsignedWrap(WrapFlags.HasNUW);
I.setHasNoSignedWrap(WrapFlags.HasNSW);
if (isa<OverflowingBinaryOperator>(I) || isa<TruncInst>(I)) {
I.setHasNoUnsignedWrap(WrapFlags.HasNUW);
I.setHasNoSignedWrap(WrapFlags.HasNSW);
}
break;
case OperationType::DisjointOp:
cast<PossiblyDisjointInst>(&I)->setIsDisjoint(DisjointFlags.IsDisjoint);
if (auto *Disjoint = dyn_cast<PossiblyDisjointInst>(&I))
Disjoint->setIsDisjoint(DisjointFlags.IsDisjoint);
break;
case OperationType::PossiblyExactOp:
I.setIsExact(ExactFlags.IsExact);
if (isa<PossiblyExactOperator>(I))
I.setIsExact(ExactFlags.IsExact);
break;
case OperationType::GEPOp:
cast<GetElementPtrInst>(&I)->setNoWrapFlags(GEPFlags);
if (auto *GEP = dyn_cast<GetElementPtrInst>(&I))
GEP->setNoWrapFlags(GEPFlags);
break;
case OperationType::FPMathOp:
I.setHasAllowReassoc(FMFs.AllowReassoc);
I.setHasNoNaNs(FMFs.NoNaNs);
I.setHasNoInfs(FMFs.NoInfs);
I.setHasNoSignedZeros(FMFs.NoSignedZeros);
I.setHasAllowReciprocal(FMFs.AllowReciprocal);
I.setHasAllowContract(FMFs.AllowContract);
I.setHasApproxFunc(FMFs.ApproxFunc);
if (isa<FPMathOperator>(I)) {
I.setHasAllowReassoc(FMFs.AllowReassoc);
I.setHasNoNaNs(FMFs.NoNaNs);
I.setHasNoInfs(FMFs.NoInfs);
I.setHasNoSignedZeros(FMFs.NoSignedZeros);
I.setHasAllowReciprocal(FMFs.AllowReciprocal);
I.setHasAllowContract(FMFs.AllowContract);
I.setHasApproxFunc(FMFs.ApproxFunc);
}
break;
case OperationType::NonNegOp:
I.setNonNeg(NonNegFlags.NonNeg);
if (isa<PossiblyNonNegInst>(I))
I.setNonNeg(NonNegFlags.NonNeg);
break;
case OperationType::Cmp:
case OperationType::Other:
Expand Down
12 changes: 5 additions & 7 deletions llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,19 +7,17 @@ define void @pr63340(ptr %A, ptr %B) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
; CHECK: vector.ph:
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 1
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP1]], i64 0
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[A]], i64 1
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i64 0
; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x ptr> [[DOTSPLATINSERT]], <4 x ptr> poison, <4 x i32> zeroinitializer
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = trunc i32 [[INDEX]] to i8
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds ptr, ptr [[B]], i8 [[OFFSET_IDX]]
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 0
; CHECK-NEXT: store <4 x ptr> [[DOTSPLAT]], ptr [[TMP3]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds ptr, ptr [[B]], i8 [[OFFSET_IDX]]
; CHECK-NEXT: store <4 x ptr> [[DOTSPLAT]], ptr [[TMP1]], align 8
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 128
; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK-NEXT: br i1 false, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK: middle.block:
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
; CHECK: scalar.ph:
Expand Down
8 changes: 3 additions & 5 deletions llvm/test/Transforms/LoopVectorize/widen-intrinsic.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,13 +12,11 @@ define void @powi_only_first_lane_used_of_second_arg(ptr %p, i32 %pow) {
; CHECK: [[VECTOR_BODY]]:
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr float, ptr [[P]], i32 [[INDEX]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr float, ptr [[TMP0]], i32 0
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP1]], align 4
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.powi.v4f32.i32(<4 x float> [[WIDE_LOAD]], i32 [[POW]])
; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[TMP1]], align 4
; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[TMP0]], align 4
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024
; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK-NEXT: br i1 false, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK: [[MIDDLE_BLOCK]]:
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
; CHECK: [[SCALAR_PH]]:
Expand Down
Loading