Skip to content
Open
Show file tree
Hide file tree
Changes from 4 commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 14 additions & 0 deletions llvm/lib/Analysis/InstructionSimplify.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2176,6 +2176,20 @@ static Value *simplifyAndInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
match(Op1, m_Xor(m_Specific(A), m_SpecificInt(~*C1))))
return Constant::getNullValue(Op0->getType());

// (X <= ~Y) && (Y > ~X) --> 0
CmpPredicate Pred0, Pred1;
if (match(Op0,
m_c_ICmp(Pred0, m_Value(X), m_c_Xor(m_Value(Y), m_AllOnes()))) &&
match(Op1, m_c_ICmp(Pred1, m_Specific(Y),
m_c_Xor(m_Specific(X), m_AllOnes())))) {
if (ICmpInst::isLE(Pred0) && ICmpInst::isGT(Pred1))
return ConstantInt::getFalse(Op0->getType());
if (ICmpInst::isLT(Pred0) && ICmpInst::isGE(Pred1))
return ConstantInt::getFalse(Op0->getType());
if (ICmpInst::isLT(Pred0) && ICmpInst::isGT(Pred1))
return ConstantInt::getFalse(Op0->getType());
}

if (Op0->getType()->isIntOrIntVectorTy(1)) {
if (std::optional<bool> Implied = isImpliedCondition(Op0, Op1, Q.DL)) {
// If Op0 is true implies Op1 is true, then Op0 is a subset of Op1.
Expand Down
138 changes: 138 additions & 0 deletions llvm/test/Transforms/InstCombine/and-comparison-not-always-false.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,138 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
define i1 @test_pass_et(i32 %0, i32 %1) {
; CHECK-LABEL: define i1 @test_pass_et(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: ret i1 false
;
common.ret:
%2 = xor i32 %0, -1
%3 = icmp ule i32 %1, %2
%4 = xor i32 %1, -1
%5 = icmp ugt i32 %0, %4
%common.ret.op = and i1 %3, %5
ret i1 %common.ret.op
}

define i1 @test_pass_signed(i32 %0, i32 %1) {
; CHECK-LABEL: define i1 @test_pass_signed(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: ret i1 false
;
common.ret:
%2 = xor i32 %0, -1
%3 = icmp sle i32 %1, %2
%4 = xor i32 %1, -1
%5 = icmp sgt i32 %0, %4
%common.ret.op = and i1 %3, %5
ret i1 %common.ret.op
}

define i1 @test_pass_tt(i32 %0, i32 %1) {
; CHECK-LABEL: define i1 @test_pass_tt(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: ret i1 false
;
common.ret:
%2 = xor i32 %0, -1
%3 = icmp ult i32 %1, %2
%4 = xor i32 %1, -1
%5 = icmp ugt i32 %0, %4
%common.ret.op = and i1 %3, %5
ret i1 %common.ret.op
}

define i1 @test_pass_te(i32 %0, i32 %1) {
; CHECK-LABEL: define i1 @test_pass_te(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: ret i1 false
;
common.ret:
%2 = xor i32 %0, -1
%3 = icmp ult i32 %1, %2
%4 = xor i32 %1, -1
%5 = icmp uge i32 %0, %4
%common.ret.op = and i1 %3, %5
ret i1 %common.ret.op
}

define i1 @test_nopass_ee(i32 %0, i32 %1) {
; CHECK-LABEL: define i1 @test_nopass_ee(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP0]], -1
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: [[TMP5:%.*]] = icmp uge i32 [[TMP0]], [[TMP4]]
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = and i1 [[TMP3]], [[TMP5]]
; CHECK-NEXT: ret i1 [[COMMON_RET_OP]]
;
common.ret:
%2 = xor i32 %0, -1
%3 = icmp ule i32 %1, %2
%4 = xor i32 %1, -1
%5 = icmp uge i32 %0, %4
%common.ret.op = and i1 %3, %5
ret i1 %common.ret.op
}

define i1 @test_no_change_et(i32 %0, i32 %1, i32 %2) {
; CHECK-LABEL: define i1 @test_no_change_et(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0]], -1
; CHECK-NEXT: [[TMP4:%.*]] = icmp ule i32 [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = and i1 [[TMP5]], [[TMP4]]
; CHECK-NEXT: ret i1 [[COMMON_RET_OP]]
;
common.ret:
%3 = xor i32 %0, -1
%4 = icmp ule i32 %1, %3
%5 = xor i32 %1, -1
%6 = icmp ugt i32 %1, %5
%common.ret.op = and i1 %6, %4
ret i1 %common.ret.op
}

define i1 @test_no_change_te(i32 %0, i32 %1, i32 %2) {
; CHECK-LABEL: define i1 @test_no_change_te(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0]], -1
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = and i1 [[TMP5]], [[TMP4]]
; CHECK-NEXT: ret i1 [[COMMON_RET_OP]]
;
common.ret:
%3 = xor i32 %0, -1
%4 = icmp ult i32 %1, %3
%5 = xor i32 %1, -1
%6 = icmp uge i32 %1, %5
%common.ret.op = and i1 %6, %4
ret i1 %common.ret.op
}

define i1 @test_no_change_tt(i32 %0, i32 %1, i32 %2) {
; CHECK-LABEL: define i1 @test_no_change_tt(
; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
; CHECK-NEXT: [[COMMON_RET:.*:]]
; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0]], -1
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = and i1 [[TMP5]], [[TMP4]]
; CHECK-NEXT: ret i1 [[COMMON_RET_OP]]
;
common.ret:
%3 = xor i32 %0, -1
%4 = icmp ult i32 %1, %3
%5 = xor i32 %1, -1
%6 = icmp ugt i32 %1, %5
%common.ret.op = and i1 %6, %4
ret i1 %common.ret.op
}