[RISCV] Correct Branch Range

[lenary]

This aligns the code with the other cases, which take into account the min/max range of isShiftedInt<N, 1>. Given IALIGN is always 16 or 32 (bits), this should not make a difference to anything valid.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: Sam Elliott (lenary)

Changes

This aligns the code with the other cases, which take into account the min/max range of isShiftedInt<N, 1>. Given IALIGN is always 16 or 32 (bits), this should not make a difference to anything valid.

---

Full diff: https://github.com/llvm/llvm-project/pull/142705.diff

1 Files Affected:

• (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp (+2-2)

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 963501db118e7..cd527f188a284 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -133,8 +133,8 @@ bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
   case RISCV::fixup_riscv_branch:
   case RISCV::fixup_riscv_qc_e_branch:
     // For conditional branch instructions the immediate must be
-    // in the range [-4096, 4095].
-    return !isInt<13>(Offset);
+    // in the range [-4096, 4094].
+    return Offset > 4094 || Offset < -4096;
   }
 }
 

[topperc]

LGTM