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[SPIR-V] Fix ExecutionMode generation #143888

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Merged
merged 2 commits into from
Jun 12, 2025
Merged

[SPIR-V] Fix ExecutionMode generation #143888

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352cc33
[SPIR-V] Fix ExecutionMode generation
Keenuts Jun 12, 2025
6fd3879
add test
Keenuts Jun 12, 2025
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16 changes: 16 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -510,6 +510,22 @@ void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
continue;
MCRegister FReg = MAI->getFuncReg(&F);
assert(FReg.isValid());

if (Attribute Attr = F.getFnAttribute("hlsl.shader"); Attr.isValid()) {
// SPIR-V common validation: Fragment requires OriginUpperLeft or
// OriginLowerLeft.
// VUID-StandaloneSpirv-OriginLowerLeft-04653: Fragment must declare
// OriginUpperLeft.
if (Attr.getValueAsString() == "pixel") {
MCInst Inst;
Inst.setOpcode(SPIRV::OpExecutionMode);
Inst.addOperand(MCOperand::createReg(FReg));
unsigned EM =
static_cast<unsigned>(SPIRV::ExecutionMode::OriginUpperLeft);
Inst.addOperand(MCOperand::createImm(EM));
outputMCInst(Inst);
}
}
if (MDNode *Node = F.getMetadata("reqd_work_group_size"))
outputExecutionModeFromMDNode(FReg, Node, SPIRV::ExecutionMode::LocalSize,
3, 1);
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13 changes: 1 addition & 12 deletions llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
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Expand Up @@ -475,21 +475,10 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
// environment if we need to.
const SPIRVSubtarget *ST =
static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
SPIRV::ExecutionModel::ExecutionModel ExecutionModel =
getExecutionModel(*ST, F);
auto MIB = MIRBuilder.buildInstr(SPIRV::OpEntryPoint)
.addImm(static_cast<uint32_t>(ExecutionModel))
.addImm(static_cast<uint32_t>(getExecutionModel(*ST, F)))
.addUse(FuncVReg);
addStringImm(F.getName(), MIB);

if (ExecutionModel == SPIRV::ExecutionModel::Fragment) {
// SPIR-V common validation: Fragment requires OriginUpperLeft or
// OriginLowerLeft VUID-StandaloneSpirv-OriginLowerLeft-04653: Fragment
// must declare OriginUpperLeft.
MIRBuilder.buildInstr(SPIRV::OpExecutionMode)
.addUse(FuncVReg)
.addImm(static_cast<uint32_t>(SPIRV::ExecutionMode::OriginUpperLeft));
}
} else if (F.getLinkage() != GlobalValue::InternalLinkage &&
F.getLinkage() != GlobalValue::PrivateLinkage) {
SPIRV::LinkageType::LinkageType LnkTy =
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2 changes: 0 additions & 2 deletions llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
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Expand Up @@ -595,8 +595,6 @@ void SPIRVModuleAnalysis::processOtherInstrs(const Module &M) {
collectOtherInstr(MI, MAI, SPIRV::MB_DebugNames, IS);
} else if (OpCode == SPIRV::OpEntryPoint) {
collectOtherInstr(MI, MAI, SPIRV::MB_EntryPoints, IS);
} else if (OpCode == SPIRV::OpExecutionMode) {
collectOtherInstr(MI, MAI, SPIRV::MB_EntryPoints, IS);
} else if (TII->isAliasingInstr(MI)) {
collectOtherInstr(MI, MAI, SPIRV::MB_AliasingInsts, IS);
} else if (TII->isDecorationInstr(MI)) {
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