Skip to content
Closed
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
61 changes: 32 additions & 29 deletions llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1238,6 +1238,30 @@ static void emitAccSpillRestoreInfo(MachineBasicBlock &MBB, bool IsPrimed,
#endif
}

void PPCRegisterInfo::spillRegPair(MachineBasicBlock &MBB,
MachineBasicBlock::iterator II, DebugLoc DL,
const TargetInstrInfo &TII,
unsigned FrameIndex, bool IsLittleEndian,
bool IsKilled, Register Reg,
int Offset) const {

// This function does not support virtual registers.
assert(!Reg.isVirtual() &&
"Spilling register pairs does not support virtual registers.");

addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXV))
.addReg(TargetRegisterInfo::getSubReg(Reg, PPC::sub_vsx0),
getKillRegState(IsKilled)),
FrameIndex, Offset);

addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXV))
.addReg(TargetRegisterInfo::getSubReg(Reg, PPC::sub_vsx1),
getKillRegState(IsKilled)),
FrameIndex, IsLittleEndian ? Offset - 16 : Offset + 16);
}

/// Remove any STXVP[X] instructions and split them out into a pair of
/// STXV[X] instructions if --disable-auto-paired-vec-st is specified on
/// the command line.
Expand All @@ -1255,19 +1279,8 @@ void PPCRegisterInfo::lowerOctWordSpilling(MachineBasicBlock::iterator II,
bool IsLittleEndian = Subtarget.isLittleEndian();
bool IsKilled = MI.getOperand(0).isKill();

assert(PPC::VSRpRCRegClass.contains(SrcReg) &&
"Expecting STXVP to be utilizing a VSRp register.");

addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXV))
.addReg(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_vsx0),
getKillRegState(IsKilled)),
FrameIndex, IsLittleEndian ? 16 : 0);
addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXV))
.addReg(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_vsx1),
getKillRegState(IsKilled)),
FrameIndex, IsLittleEndian ? 0 : 16);
spillRegPair(MBB, II, DL, TII, FrameIndex, IsLittleEndian, IsKilled, SrcReg,
IsLittleEndian ? 16 : 0);

// Discard the original instruction.
MBB.erase(II);
Expand Down Expand Up @@ -1313,22 +1326,12 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
if (IsPrimed)
BuildMI(MBB, II, DL, TII.get(PPC::XXMFACC), SrcReg).addReg(SrcReg);
if (DisableAutoPairedVecSt) {
auto spillPair = [&](Register Reg, int Offset) {
addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXV))
.addReg(TargetRegisterInfo::getSubReg(Reg, PPC::sub_vsx0),
getKillRegState(IsKilled)),
FrameIndex, Offset);
addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXV))
.addReg(TargetRegisterInfo::getSubReg(Reg, PPC::sub_vsx1),
getKillRegState(IsKilled)),
FrameIndex, IsLittleEndian ? Offset - 16 : Offset + 16);
};
spillPair(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair0),
IsLittleEndian ? 48 : 0);
spillPair(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair1),
IsLittleEndian ? 16 : 32);
spillRegPair(MBB, II, DL, TII, FrameIndex, IsLittleEndian, IsKilled,
TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair0),
IsLittleEndian ? 48 : 0);
spillRegPair(MBB, II, DL, TII, FrameIndex, IsLittleEndian, IsKilled,
TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair1),
IsLittleEndian ? 16 : 32);
} else {
addFrameReference(
BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/PowerPC/PPCRegisterInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,11 @@ class PPCRegisterInfo : public PPCGenRegisterInfo {
DenseMap<unsigned, unsigned> ImmToIdxMap;
const PPCTargetMachine &TM;

void spillRegPair(MachineBasicBlock &MBB, MachineBasicBlock::iterator II,
DebugLoc DL, const TargetInstrInfo &TII,
unsigned FrameIndex, bool IsLittleEndian, bool IsKilled,
Register Reg, int Offset) const;

public:
PPCRegisterInfo(const PPCTargetMachine &TM);

Expand Down