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[mlir][amdgpu][nfc] Add PatternBenefit to populate methods #144663

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Merged
merged 1 commit into from
Jun 18, 2025
Merged

[mlir][amdgpu][nfc] Add PatternBenefit to populate methods #144663

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10 changes: 7 additions & 3 deletions mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#define MLIR_DIALECT_AMDGPU_TRANSFORMS_PASSES_H_

#include "mlir/Dialect/AMDGPU/Utils/Chipset.h"
#include "mlir/IR/PatternMatch.h"
#include "mlir/Pass/Pass.h"

namespace mlir {
Expand All @@ -28,11 +29,14 @@ namespace amdgpu {

void populateAmdgpuEmulateAtomicsPatterns(ConversionTarget &target,
RewritePatternSet &patterns,
Chipset chipset);
Chipset chipset,
PatternBenefit benefit = 1);

void populateAmdgpuResolveStridedMetadataPatterns(RewritePatternSet &patterns);
void populateAmdgpuResolveStridedMetadataPatterns(RewritePatternSet &patterns,
PatternBenefit benefit = 1);

void populateAmdgpuTransferReadToLoadPatterns(RewritePatternSet &patterns);
void populateAmdgpuTransferReadToLoadPatterns(RewritePatternSet &patterns,
PatternBenefit benefit = 1);

} // namespace amdgpu
} // namespace mlir
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5 changes: 3 additions & 2 deletions mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
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Expand Up @@ -164,7 +164,8 @@ LogicalResult RawBufferAtomicByCasPattern<AtomicOp, ArithOp>::matchAndRewrite(
}

void mlir::amdgpu::populateAmdgpuEmulateAtomicsPatterns(
ConversionTarget &target, RewritePatternSet &patterns, Chipset chipset) {
ConversionTarget &target, RewritePatternSet &patterns, Chipset chipset,
PatternBenefit benefit) {
// gfx10 has no atomic adds.
if (chipset.majorVersion == 10 || chipset < Chipset(9, 0, 8)) {
target.addIllegalOp<RawBufferAtomicFaddOp>();
Expand Down Expand Up @@ -204,7 +205,7 @@ void mlir::amdgpu::populateAmdgpuEmulateAtomicsPatterns(
RawBufferAtomicByCasPattern<RawBufferAtomicFmaxOp, arith::MaximumFOp>,
RawBufferAtomicByCasPattern<RawBufferAtomicSmaxOp, arith::MaxSIOp>,
RawBufferAtomicByCasPattern<RawBufferAtomicUminOp, arith::MinUIOp>>(
patterns.getContext());
patterns.getContext(), benefit);
}

void AmdgpuEmulateAtomicsPass::runOnOperation() {
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4 changes: 2 additions & 2 deletions mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
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Expand Up @@ -66,9 +66,9 @@ struct ExtractStridedMetadataOnFatRawBufferCastFolder final
} // namespace

void mlir::amdgpu::populateAmdgpuResolveStridedMetadataPatterns(
RewritePatternSet &patterns) {
RewritePatternSet &patterns, PatternBenefit benefit) {
patterns.add<ExtractStridedMetadataOnFatRawBufferCastFolder>(
patterns.getContext());
patterns.getContext(), benefit);
}

void AmdgpuResolveStridedMetadataPass::runOnOperation() {
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4 changes: 2 additions & 2 deletions mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
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Expand Up @@ -222,8 +222,8 @@ struct TransferReadLowering final : OpRewritePattern<vector::TransferReadOp> {
} // namespace

void mlir::amdgpu::populateAmdgpuTransferReadToLoadPatterns(
RewritePatternSet &patterns) {
patterns.add<TransferReadLowering>(patterns.getContext());
RewritePatternSet &patterns, PatternBenefit benefit) {
patterns.add<TransferReadLowering>(patterns.getContext(), benefit);
}

struct AmdgpuTransferReadToLoadPass final
Expand Down
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