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ARM: Avoid using isTarget wrappers around Triple predicates #144705

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Merged
merged 3 commits into from
Jun 20, 2025
Merged

ARM: Avoid using isTarget wrappers around Triple predicates #144705

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ARM: Avoid using isTarget wrappers around Triple predicates
arsenm Jun 18, 2025
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arsenm Jun 19, 2025
a2c9f8c
clang-format
arsenm Jun 19, 2025
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29 changes: 14 additions & 15 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -515,7 +515,9 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
setBooleanContents(ZeroOrOneBooleanContent);
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);

if (Subtarget->isTargetMachO()) {
const Triple &TT = TM.getTargetTriple();

if (TT.isOSBinFormatMachO()) {
// Uses VFP for Thumb libfuncs if available.
if (Subtarget->isThumb() && Subtarget->hasVFP2Base() &&
Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) {
Expand Down Expand Up @@ -588,9 +590,8 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
}

// RTLIB
if (TM.isAAPCS_ABI() &&
(Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() ||
Subtarget->isTargetMuslAEABI() || Subtarget->isTargetAndroid())) {
if (TM.isAAPCS_ABI() && (TT.isTargetAEABI() || TT.isTargetGNUAEABI() ||
TT.isTargetMuslAEABI() || TT.isAndroid())) {
// clang-format off
static const struct {
const RTLIB::Libcall Op;
Expand Down Expand Up @@ -712,7 +713,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
// The half <-> float conversion functions are always soft-float on
// non-watchos platforms, but are needed for some targets which use a
// hard-float calling convention by default.
if (!Subtarget->isTargetWatchABI()) {
if (!TT.isWatchABI()) {
if (TM.isAAPCS_ABI()) {
setLibcallCallingConv(RTLIB::FPROUND_F32_F16, CallingConv::ARM_AAPCS);
setLibcallCallingConv(RTLIB::FPROUND_F64_F16, CallingConv::ARM_AAPCS);
Expand All @@ -726,7 +727,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,

// In EABI, these functions have an __aeabi_ prefix, but in GNUEABI they have
// a __gnu_ prefix (which is the default).
if (Subtarget->isTargetAEABI()) {
if (TT.isTargetAEABI()) {
static const struct {
const RTLIB::Libcall Op;
const char * const Name;
Expand All @@ -741,7 +742,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
setLibcallName(LC.Op, LC.Name);
setLibcallCallingConv(LC.Op, LC.CC);
}
} else if (!Subtarget->isTargetMachO()) {
} else if (!TT.isOSBinFormatMachO()) {
setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
}
Expand Down Expand Up @@ -1227,7 +1228,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
setOperationAction(ISD::UDIV, MVT::i32, LibCall);
}

if (Subtarget->isTargetWindows() && !Subtarget->hasDivideInThumbMode()) {
if (TT.isOSWindows() && !Subtarget->hasDivideInThumbMode()) {
setOperationAction(ISD::SDIV, MVT::i32, Custom);
setOperationAction(ISD::UDIV, MVT::i32, Custom);

Expand All @@ -1239,9 +1240,8 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
setOperationAction(ISD::UREM, MVT::i32, Expand);

// Register based DivRem for AEABI (RTABI 4.2)
if (Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid() ||
Subtarget->isTargetGNUAEABI() || Subtarget->isTargetMuslAEABI() ||
Subtarget->isTargetWindows()) {
if (TT.isTargetAEABI() || TT.isAndroid() || TT.isTargetGNUAEABI() ||
TT.isTargetMuslAEABI() || TT.isOSWindows()) {
setOperationAction(ISD::SREM, MVT::i64, Custom);
setOperationAction(ISD::UREM, MVT::i64, Custom);
HasStandaloneRem = false;
Expand Down Expand Up @@ -1271,7 +1271,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);

if (Subtarget->isTargetWindows())
if (TT.isOSWindows())
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
else
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
Expand Down Expand Up @@ -1326,8 +1326,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
}

// Compute supported atomic widths.
if (Subtarget->isTargetLinux() ||
(!Subtarget->isMClass() && Subtarget->hasV6Ops())) {
if (TT.isOSLinux() || (!Subtarget->isMClass() && Subtarget->hasV6Ops())) {
// For targets where __sync_* routines are reliably available, we use them
// if necessary.
//
Expand Down Expand Up @@ -1538,7 +1537,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,

// On MSVC, both 32-bit and 64-bit, ldexpf(f32) is not defined. MinGW has
// it, but it's just a wrapper around ldexp.
if (Subtarget->isTargetWindows()) {
if (TT.isOSWindows()) {
for (ISD::NodeType Op : {ISD::FLDEXP, ISD::STRICT_FLDEXP, ISD::FFREXP})
if (isOperationExpand(Op, MVT::f32))
setOperationAction(Op, MVT::f32, Promote);
Expand Down
4 changes: 4 additions & 0 deletions llvm/lib/Target/ARM/ARMSubtarget.h
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Original file line number Diff line number Diff line change
Expand Up @@ -334,6 +334,9 @@ class ARMSubtarget : public ARMGenSubtargetInfo {

const Triple &getTargetTriple() const { return TargetTriple; }

/// @{
/// These properties are per-module, please use the TargetMachine
/// TargetTriple.
bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
bool isTargetIOS() const { return TargetTriple.isiOS(); }
bool isTargetWatchOS() const { return TargetTriple.isWatchOS(); }
Expand All @@ -359,6 +362,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
bool isTargetEHABICompatible() const {
return TargetTriple.isTargetEHABICompatible();
}
/// @}

bool isReadTPSoft() const {
return !(isReadTPTPIDRURW() || isReadTPTPIDRURO() || isReadTPTPIDRPRW());
Expand Down