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[X86] canCreateUndefOrPoisonForTargetNode - PCMPEQ/PCMPGT don't create poison/undef #146116

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Merged
merged 1 commit into from
Jun 28, 2025
Merged

[X86] canCreateUndefOrPoisonForTargetNode - PCMPEQ/PCMPGT don't create poison/undef #146116

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6 changes: 4 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -45093,9 +45093,11 @@ bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
case X86ISD::UNPCKH:
case X86ISD::UNPCKL:
return false;
// SSE comparisons handle all fcmp cases.
// TODO: Add PCMPEQ/GT and CMPM/MM with test coverage.
// SSE comparisons handle all icmp/fcmp cases.
// TODO: Add CMPM/MM with test coverage.
case X86ISD::CMPP:
case X86ISD::PCMPEQ:
case X86ISD::PCMPGT:
return false;
case ISD::INTRINSIC_WO_CHAIN:
switch (Op->getConstantOperandVal(0)) {
Expand Down
42 changes: 20 additions & 22 deletions llvm/test/CodeGen/X86/vector-compress.ll
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Expand Up @@ -138,22 +138,21 @@ define <2 x i64> @test_compress_v2i64(<2 x i64> %vec, <2 x i1> %mask, <2 x i64>
; AVX2-NEXT: vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT: vpextrq $1, %xmm1, %rax
; AVX2-NEXT: vmovq %xmm1, %rcx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: movl %ecx, %edx
; AVX2-NEXT: subl %eax, %edx
; AVX2-NEXT: andl $1, %edx
; AVX2-NEXT: subq %rax, %rcx
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rcx, %rax
; AVX2-NEXT: vpextrq $1, %xmm0, %rsi
; AVX2-NEXT: cmpq $2, %rax
; AVX2-NEXT: cmovbq -24(%rsp,%rdx,8), %rsi
; AVX2-NEXT: cmpq $2, %rcx
; AVX2-NEXT: cmovbq -24(%rsp,%rax,8), %rsi
; AVX2-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT: movl %ecx, %ecx
; AVX2-NEXT: vpextrq $1, %xmm0, -24(%rsp,%rcx,8)
; AVX2-NEXT: cmpq $1, %rax
; AVX2-NEXT: movl $1, %ecx
; AVX2-NEXT: cmovbq %rax, %rcx
; AVX2-NEXT: movq %rsi, -24(%rsp,%rcx,8)
; AVX2-NEXT: vpextrq $1, %xmm0, -24(%rsp,%rdx,8)
; AVX2-NEXT: cmpq $1, %rcx
; AVX2-NEXT: movl $1, %eax
; AVX2-NEXT: cmovbq %rcx, %rax
; AVX2-NEXT: movl %eax, %eax
; AVX2-NEXT: movq %rsi, -24(%rsp,%rax,8)
; AVX2-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT: retq
;
Expand Down Expand Up @@ -188,18 +187,16 @@ define <2 x double> @test_compress_v2f64(<2 x double> %vec, <2 x i1> %mask, <2 x
; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3
; AVX2-NEXT: vpcmpgtq %xmm1, %xmm3, %xmm1
; AVX2-NEXT: vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT: vpextrq $1, %xmm1, %rax
; AVX2-NEXT: vmovq %xmm1, %rcx
; AVX2-NEXT: movl %ecx, %edx
; AVX2-NEXT: subl %eax, %edx
; AVX2-NEXT: andl $1, %edx
; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
; AVX2-NEXT: vmovq %xmm1, %rax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: movl %eax, %edx
; AVX2-NEXT: subq %rcx, %rax
; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT: vmovlpd %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: movl %ecx, %edx
; AVX2-NEXT: vmovhpd %xmm0, -24(%rsp,%rdx,8)
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
; AVX2-NEXT: cmpq $2, %rax
; AVX2-NEXT: jb .LBB3_2
; AVX2-NEXT: # %bb.1:
Expand All @@ -208,7 +205,8 @@ define <2 x double> @test_compress_v2f64(<2 x double> %vec, <2 x i1> %mask, <2 x
; AVX2-NEXT: cmpq $1, %rax
; AVX2-NEXT: movl $1, %ecx
; AVX2-NEXT: cmovbq %rax, %rcx
; AVX2-NEXT: vmovsd %xmm1, -24(%rsp,%rcx,8)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: vmovsd %xmm1, -24(%rsp,%rax,8)
; AVX2-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT: retq
;
Expand Down