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[AMDGPU] Fix wrong reverse operations for v_cmpx_le_u32 #146398

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Merged
merged 1 commit into from
Jul 1, 2025
Merged

[AMDGPU] Fix wrong reverse operations for v_cmpx_le_u32 #146398

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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/VOPCInstructions.td
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Original file line number Diff line number Diff line change
Expand Up @@ -846,7 +846,7 @@ defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">;
defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">;
defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">;
defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">;
defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">;
defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_ge_u32">;
defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">;
defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">;
defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">;
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
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Expand Up @@ -17,7 +17,7 @@ body: |
bb.0:
; GCN-LABEL: name: shrink_icmp
; GCN: %op0:sgpr_32 = COPY $sgpr0
; GCN-NEXT: %cond:sreg_64 = V_CMPX_LE_U32_e64 5, %op0, implicit-def $exec, implicit $exec
; GCN-NEXT: %cond:sreg_64 = V_CMPX_GE_U32_e64 5, %op0, implicit-def $exec, implicit $exec
; GCN-NEXT: S_NOP 0
%op0:sgpr_32 = COPY $sgpr0
%cond:sreg_64 = V_CMPX_LE_U32_e64 %op0, 5, implicit-def $exec, implicit $exec
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