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[PowerPC] Pre-commit test case to ensure that milicode is not used for memcmp, but instead a library call is used on AIX OS. #146948

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merged 2 commits into from
Jul 4, 2025
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[PowerPC] Pre-commit test case to ensure that milicode is not used for memcmp, but instead a library call is used on AIX OS. #146948

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[PowerPC] Pre-commit test case to ensure that milicode is not used fo…
diggerlin Jul 3, 2025
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diggerlin Jul 4, 2025
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39 changes: 39 additions & 0 deletions llvm/test/CodeGen/PowerPC/memintr32.ll
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Original file line number Diff line number Diff line change
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names -mtriple=powerpc-ibm-aix < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P9
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@lei137 lei137 Jul 4, 2025

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Run lines for powerpc-unknown-linux-gnu?


; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names -mtriple=powerpc-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-LINUX32-P9

define i32 @memcmp_test(ptr nocapture noundef readonly %ptr1, ptr nocapture noundef readonly %ptr2, i32 noundef %num) nounwind {
; CHECK-AIX-32-P9-LABEL: memcmp_test:
; CHECK-AIX-32-P9: # %bb.0: # %entry
; CHECK-AIX-32-P9-NEXT: mflr r0
; CHECK-AIX-32-P9-NEXT: stwu r1, -64(r1)
; CHECK-AIX-32-P9-NEXT: stw r0, 72(r1)
; CHECK-AIX-32-P9-NEXT: bl .memcmp[PR]
; CHECK-AIX-32-P9-NEXT: nop
; CHECK-AIX-32-P9-NEXT: addi r1, r1, 64
; CHECK-AIX-32-P9-NEXT: lwz r0, 8(r1)
; CHECK-AIX-32-P9-NEXT: mtlr r0
; CHECK-AIX-32-P9-NEXT: blr
;
; CHECK-LINUX32-P9-LABEL: memcmp_test:
; CHECK-LINUX32-P9: # %bb.0: # %entry
; CHECK-LINUX32-P9-NEXT: mflr r0
; CHECK-LINUX32-P9-NEXT: stwu r1, -16(r1)
; CHECK-LINUX32-P9-NEXT: stw r0, 20(r1)
; CHECK-LINUX32-P9-NEXT: bl memcmp
; CHECK-LINUX32-P9-NEXT: lwz r0, 20(r1)
; CHECK-LINUX32-P9-NEXT: addi r1, r1, 16
; CHECK-LINUX32-P9-NEXT: mtlr r0
; CHECK-LINUX32-P9-NEXT: blr
entry:
%call = tail call i32 @memcmp(ptr noundef %ptr1, ptr noundef %ptr2, i32 noundef %num)
ret i32 %call
}

declare i32 @memcmp(ptr noundef captures(none), ptr noundef captures(none), i32 noundef) nounwind



55 changes: 55 additions & 0 deletions llvm/test/CodeGen/PowerPC/memintr64.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-LE-P9
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-BE-P9
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64-ibm-aix < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P9

define noundef i32 @_Z11memcmp_testPKvS0_m(ptr noundef readonly captures(none) %ptr1, ptr noundef readonly captures(none) %ptr2, i64 noundef %num) nounwind {
; CHECK-LE-P9-LABEL: _Z11memcmp_testPKvS0_m:
; CHECK-LE-P9: # %bb.0: # %entry
; CHECK-LE-P9-NEXT: mflr r0
; CHECK-LE-P9-NEXT: stdu r1, -32(r1)
; CHECK-LE-P9-NEXT: std r0, 48(r1)
; CHECK-LE-P9-NEXT: bl memcmp
; CHECK-LE-P9-NEXT: nop
; CHECK-LE-P9-NEXT: addi r1, r1, 32
; CHECK-LE-P9-NEXT: ld r0, 16(r1)
; CHECK-LE-P9-NEXT: mtlr r0
; CHECK-LE-P9-NEXT: blr
;
; CHECK-BE-P9-LABEL: _Z11memcmp_testPKvS0_m:
; CHECK-BE-P9: # %bb.0: # %entry
; CHECK-BE-P9-NEXT: mflr r0
; CHECK-BE-P9-NEXT: stdu r1, -112(r1)
; CHECK-BE-P9-NEXT: std r0, 128(r1)
; CHECK-BE-P9-NEXT: bl memcmp
; CHECK-BE-P9-NEXT: nop
; CHECK-BE-P9-NEXT: addi r1, r1, 112
; CHECK-BE-P9-NEXT: ld r0, 16(r1)
; CHECK-BE-P9-NEXT: mtlr r0
; CHECK-BE-P9-NEXT: blr
;
; CHECK-AIX-64-P9-LABEL: _Z11memcmp_testPKvS0_m:
; CHECK-AIX-64-P9: # %bb.0: # %entry
; CHECK-AIX-64-P9-NEXT: mflr r0
; CHECK-AIX-64-P9-NEXT: stdu r1, -112(r1)
; CHECK-AIX-64-P9-NEXT: std r0, 128(r1)
; CHECK-AIX-64-P9-NEXT: bl .memcmp[PR]
; CHECK-AIX-64-P9-NEXT: nop
; CHECK-AIX-64-P9-NEXT: addi r1, r1, 112
; CHECK-AIX-64-P9-NEXT: ld r0, 16(r1)
; CHECK-AIX-64-P9-NEXT: mtlr r0
; CHECK-AIX-64-P9-NEXT: blr
entry:
%call = tail call i32 @memcmp(ptr noundef %ptr1, ptr noundef %ptr2, i64 noundef %num)
ret i32 %call
}

declare i32 @memcmp(ptr noundef captures(none), ptr noundef captures(none), i64 noundef) nounwind