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@asb asb commented Jul 9, 2025

This adds opcodes that are handled in the RISCVOptWInstrs version but not the SDag version.


I added these when exploring the SDag approach to #144703. Overall this has some small impact on an llvm-test-suite build (diffing .s gives 8610 insertions, 8890 deletions). This patch also updates SLLI to do a recursive call similar to the RISCVOptWInstrs.

Marking this as RFC/WIP because no tests are added, and I'd like to check if there's any particular criteria for deciding what opcodes to cover (i.e. were any of the opcodes I'm adding missed on purpose).

This adds opcodes that are handled in the RISCVOptWInstrs version but
not the SDag version.
@asb asb requested a review from topperc July 9, 2025 13:43
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llvmbot commented Jul 9, 2025

@llvm/pr-subscribers-backend-risc-v

Author: Alex Bradbury (asb)

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This adds opcodes that are handled in the RISCVOptWInstrs version but not the SDag version.


I added these when exploring the SDag approach to #144703. Overall this has some small impact on an llvm-test-suite build (diffing .s gives 8610 insertions, 8890 deletions). This patch also updates SLLI to do a recursive call similar to the RISCVOptWInstrs.

Marking this as RFC/WIP because no tests are added, and I'd like to check if there's any particular criteria for deciding what opcodes to cover (i.e. were any of the opcodes I'm adding missed on purpose).


Full diff: https://github.com/llvm/llvm-project/pull/147728.diff

1 Files Affected:

  • (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+29-2)
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 4539efd591c8b..b097fb9b414ea 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3606,11 +3606,15 @@ bool RISCVDAGToDAGISel::hasAllNBitUsers(SDNode *Node, unsigned Bits,
       if (Use.getOperandNo() == 1 && Bits >= Log2_32(Subtarget->getXLen()))
         break;
       return false;
-    case RISCV::SLLI:
+    case RISCV::SLLI: {
       // SLLI only uses the lower (XLen - ShAmt) bits.
-      if (Bits >= Subtarget->getXLen() - User->getConstantOperandVal(1))
+      uint64_t ShAmt = User->getConstantOperandVal(1);
+      if (Bits >= Subtarget->getXLen() - ShAmt)
+        break;
+      if (hasAllNBitUsers(User, Bits + ShAmt, Depth + 1))
         break;
       return false;
+    }
     case RISCV::ANDI:
       if (Bits >= (unsigned)llvm::bit_width(User->getConstantOperandVal(1)))
         break;
@@ -3621,20 +3625,39 @@ bool RISCVDAGToDAGISel::hasAllNBitUsers(SDNode *Node, unsigned Bits,
         break;
       [[fallthrough]];
     }
+    case RISCV::COPY:
+    case RISCV::PHI:
+    case RISCV::ADD:
+    case RISCV::ADDI:
     case RISCV::AND:
+    case RISCV::MUL:
     case RISCV::OR:
+    case RISCV::SUB:
     case RISCV::XOR:
     case RISCV::XORI:
     case RISCV::ANDN:
+    case RISCV::BREV8:
+    case RISCV::CLMUL:
+    case RISCV::ORC_B:
     case RISCV::ORN:
     case RISCV::XNOR:
     case RISCV::SH1ADD:
     case RISCV::SH2ADD:
     case RISCV::SH3ADD:
+    case RISCV::BSETI:
+    case RISCV::BCLRI:
+    case RISCV::BINVI:
     RecCheck:
       if (hasAllNBitUsers(User, Bits, Depth + 1))
         break;
       return false;
+    case RISCV::CZERO_EQZ:
+    case RISCV::CZERO_NEZ:
+      if (Use.getOperandNo() != 0)
+        return false;
+      if (hasAllNBitUsers(User, Bits, Depth + 1))
+        break;
+      return false;
     case RISCV::SRLI: {
       unsigned ShAmt = User->getConstantOperandVal(1);
       // If we are shifting right by less than Bits, and users don't demand any
@@ -3670,6 +3693,10 @@ bool RISCVDAGToDAGISel::hasAllNBitUsers(SDNode *Node, unsigned Bits,
       if (Use.getOperandNo() == 0 && Bits >= 32)
         break;
       return false;
+    case RISCV::BEXTI:
+      if (User->getConstantOperandVal(1) >= Bits)
+        return false;
+      break;
     case RISCV::SB:
       if (Use.getOperandNo() == 0 && Bits >= 8)
         break;

@asb
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asb commented Jul 21, 2025

Thanks for the note on ORC_B/BREV8. I've incorporated the corrected ORC_B/BREV8 logic from #148076 and the SLLIW improvement from #143844 and updated to HEAD.

What are your thoughts on:

  • If there should be any particular threshold for adding things to the ISel hasAllNBitUsers or we should just keep it in sync best effort (as this PR tries to do)
  • Testing

@topperc
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topperc commented Jul 21, 2025

If there should be any particular threshold for adding things to the ISel hasAllNBitUsers or we should just keep it in sync best effort (as this PR tries to do)

My primary concern is the compile time cost of the recursion. If we can't construct a test case that shows benefit then I'm not sure we should pay that cost.

[[fallthrough]];
}
case RISCV::COPY:
case RISCV::PHI:
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I don't think you can see a PHI or COPY node in SelectionDAG.

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3 participants