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[mlir][rocdl] Add s.sleep intrinsic #147936

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Merged
Hardcode84 merged 1 commit into from
Jul 10, 2025
Merged

[mlir][rocdl] Add s.sleep intrinsic #147936

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5 changes: 5 additions & 0 deletions mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
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Original file line number Diff line number Diff line change
Expand Up @@ -251,6 +251,11 @@ def ROCDL_SWaitcntOp : ROCDL_ConcreteNonMemIntrOp<"s.waitcnt", [], 0, [0], ["bit
let assemblyFormat = "attr-dict $bitfield";
}

def ROCDL_SSleepOp : ROCDL_ConcreteNonMemIntrOp<"s.sleep", [], 0, [0], ["count"]>,
Arguments<(ins I32Attr:$count)> {
let assemblyFormat = "attr-dict $count";
}

def ROCDL_SBarrierOp : ROCDL_ConcreteNonMemIntrOp<"s.barrier", [], 0> {
let assemblyFormat = "attr-dict";
}
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7 changes: 7 additions & 0 deletions mlir/test/Dialect/LLVMIR/rocdl.mlir
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Expand Up @@ -923,6 +923,13 @@ llvm.func @rocdl.s.waitcnt() {
llvm.return
}

llvm.func @rocdl.s.sleep() {
// CHECK-LABEL: rocdl.s.sleep
// CHECK: rocdl.s.sleep 0
rocdl.s.sleep 0
llvm.return
}

llvm.func @rocdl.s.barrier() {
// CHECK-LABEL: rocdl.s.barrier
// CHECK: rocdl.s.barrier
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7 changes: 7 additions & 0 deletions mlir/test/Target/LLVMIR/rocdl.mlir
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Expand Up @@ -151,6 +151,13 @@ llvm.func @rocdl.s.waitcnt() {
llvm.return
}

llvm.func @rocdl.s.sleep() {
// CHECK-LABEL: rocdl.s.sleep
// CHECK-NEXT: call void @llvm.amdgcn.s.sleep(i32 0)
rocdl.s.sleep 0
llvm.return
}

llvm.func @rocdl.s.barrier() {
// CHECK-LABEL: rocdl.s.barrier
// CHECK-NEXT: call void @llvm.amdgcn.s.barrier()
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