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[AMDGPU] Add gfx1250 v_fmac_f64 implementation #148725

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Merged
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Jul 14, 2025
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[AMDGPU] Add gfx1250 v_fmac_f64 implementation #148725

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1 change: 1 addition & 0 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
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Expand Up @@ -639,6 +639,7 @@ bool isMAC(unsigned Opc) {
Opc == AMDGPU::V_MAC_LEGACY_F32_e64_gfx10 ||
Opc == AMDGPU::V_MAC_F16_e64_vi ||
Opc == AMDGPU::V_FMAC_F64_e64_gfx90a ||
Opc == AMDGPU::V_FMAC_F64_e64_gfx12 ||
Opc == AMDGPU::V_FMAC_F32_e64_gfx10 ||
Opc == AMDGPU::V_FMAC_F32_e64_gfx11 ||
Opc == AMDGPU::V_FMAC_F32_e64_gfx12 ||
Expand Down
19 changes: 14 additions & 5 deletions llvm/lib/Target/AMDGPU/VOP2Instructions.td
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Expand Up @@ -175,10 +175,14 @@ multiclass VOP2Inst_e64<string opName,
def _e64 : VOP3InstBase <opName, P, node, 1>,
Commutable_REV<revOp#"_e64", !eq(revOp, opName)>;

let SubtargetPredicate = isGFX11Plus in {
if P.HasExtVOP3DPP then
def _e64_dpp : VOP3_DPP_Pseudo <opName, P>;
} // End SubtargetPredicate = isGFX11Plus
if P.HasExtVOP3DPP then
def _e64_dpp : VOP3_DPP_Pseudo <opName, P> {
let SubtargetPredicate = isGFX11Plus;
}
else if P.HasExt64BitDPP then
def _e64_dpp : VOP3_DPP_Pseudo <opName, P> {
let OtherPredicates = [HasDPALU_DPP];
}
}

multiclass VOP2Inst_e64_VOPD<string opName,
Expand Down Expand Up @@ -1492,7 +1496,9 @@ class Base_VOP2_DPP16<bits<6> op, VOP2_DPP_Pseudo ps,
VOP2_DPP<op, ps, opName, p, 1> {
let AssemblerPredicate = HasDPP16;
let SubtargetPredicate = ps.SubtargetPredicate;
let OtherPredicates = ps.OtherPredicates;
let OtherPredicates = !listconcat(ps.OtherPredicates,
!if(p.HasExt64BitDPP, [HasDPALU_DPP], []),
!if(ps.Pfl.IsRealTrue16, [UseRealTrue16Insts], []));
}

class VOP2_DPP16<bits<6> op, VOP2_DPP_Pseudo ps, int subtarget,
Expand Down Expand Up @@ -1832,6 +1838,9 @@ let SubtargetPredicate = isGFX12Plus in {
V_SUBBREV_U32_e32, V_SUBREV_CO_CI_U32_e32_gfx12, "v_subrev_co_ci_u32">;
} // End SubtargetPredicate = isGFX12Plus

let SubtargetPredicate = HasFmacF64Inst in
defm V_FMAC_F64 : VOP2_Real_FULL<GFX12Gen, 0x17>;

defm V_FMAMK_F64 : VOP2Only_Real_MADK64<GFX1250Gen, 0x23>;
defm V_FMAAK_F64 : VOP2Only_Real_MADK64<GFX1250Gen, 0x24>;

Expand Down
45 changes: 23 additions & 22 deletions llvm/test/CodeGen/AMDGPU/fma.f64.ll
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@@ -1,16 +1,17 @@
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,SIGFX11 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,SIGFX11 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx90a -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX90A %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,SIGFX11 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx90a -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMAC_F64 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1250 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=FUNC,GCN,FMAC_F64 %s

declare double @llvm.fma.f64(double, double, double) nounwind readnone
declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
declare double @llvm.fabs.f64(double) nounwind readnone

; FUNC-LABEL: {{^}}fma_f64:
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @fma_f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
%r0 = load double, ptr addrspace(1) %in1
Expand All @@ -22,10 +23,10 @@ define amdgpu_kernel void @fma_f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
}

; FUNC-LABEL: {{^}}fma_v2f64:
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @fma_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
%r0 = load <2 x double>, ptr addrspace(1) %in1
Expand All @@ -37,14 +38,14 @@ define amdgpu_kernel void @fma_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in
}

; FUNC-LABEL: {{^}}fma_v4f64:
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @fma_v4f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
%r0 = load <4 x double>, ptr addrspace(1) %in1
Expand Down Expand Up @@ -176,8 +177,8 @@ define amdgpu_kernel void @fma_f64_abs_neg_src2(ptr addrspace(1) %out, ptr addrs
}

; FUNC-LABEL: {{^}}fma_f64_lit_src0:
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @fma_f64_lit_src0(ptr addrspace(1) %out,
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
%r1 = load double, ptr addrspace(1) %in2
Expand All @@ -188,8 +189,8 @@ define amdgpu_kernel void @fma_f64_lit_src0(ptr addrspace(1) %out,
}

; FUNC-LABEL: {{^}}fma_f64_lit_src1:
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @fma_f64_lit_src1(ptr addrspace(1) %out, ptr addrspace(1) %in1,
ptr addrspace(1) %in3) {
%r0 = load double, ptr addrspace(1) %in1
Expand Down
152 changes: 152 additions & 0 deletions llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
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Expand Up @@ -2,6 +2,158 @@
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -show-encoding %s | FileCheck --check-prefixes=GFX1250 %s
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck --check-prefix=GFX1200-ERR --implicit-check-not=error: %s

v_fmac_f64 v[4:5], v[2:3], v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[4:5] ; encoding: [0x02,0x09,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[254:255], v[2:3], v[4:5]
// GFX1250: v_fmac_f64_e32 v[254:255], v[2:3], v[4:5] ; encoding: [0x02,0x09,0xfc,0x2f]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[254:255], v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], v[254:255], v[4:5] ; encoding: [0xfe,0x09,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], vcc, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], vcc, v[4:5] ; encoding: [0x6a,0x08,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], exec, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], exec, v[4:5] ; encoding: [0x7e,0x08,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], 0, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], 0, v[4:5] ; encoding: [0x80,0x08,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], -1, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], -1, v[4:5] ; encoding: [0xc1,0x08,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], 0.5, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], 0.5, v[4:5] ; encoding: [0xf0,0x08,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], -4.0, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], -4.0, v[4:5] ; encoding: [0xf7,0x08,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], 0xaf123456, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x2e,0x56,0x34,0x12,0xaf]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], 0x3f717273, v[4:5]
// GFX1250: v_fmac_f64_e32 v[4:5], 0x3f717273, v[4:5] ; encoding: [0xff,0x08,0x08,0x2e,0x73,0x72,0x71,0x3f]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[254:255]
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[254:255] ; encoding: [0x02,0xfd,0x09,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[8:9] ; encoding: [0x02,0x11,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[254:255], v[2:3], v[8:9]
// GFX1250: v_fmac_f64_e32 v[254:255], v[2:3], v[8:9] ; encoding: [0x02,0x11,0xfc,0x2f]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[254:255], v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], v[254:255], v[8:9] ; encoding: [0xfe,0x11,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], vcc, v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], vcc, v[8:9] ; encoding: [0x6a,0x10,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], exec, v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], exec, v[8:9] ; encoding: [0x7e,0x10,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], 0, v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], 0, v[8:9] ; encoding: [0x80,0x10,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], -1, v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], -1, v[8:9] ; encoding: [0xc1,0x10,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], 0.5, v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], 0.5, v[8:9] ; encoding: [0xf0,0x10,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], -4.0, v[8:9]
// GFX1250: v_fmac_f64_e32 v[4:5], -4.0, v[8:9] ; encoding: [0xf7,0x10,0x08,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[254:255]
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[254:255] ; encoding: [0x02,0xfd,0x09,0x2e]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], vcc
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], vcc ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xd5,0x00,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], exec
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], exec ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xfd,0x00,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], 0
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], 0 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x01,0x01,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], -1
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], -1 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x83,0x01,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], 0.5
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], 0.5 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xe1,0x01,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], -4.0
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], -4.0 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xef,0x01,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], -v[2:3], v[8:9]
// GFX1250: v_fmac_f64_e64 v[4:5], -v[2:3], v[8:9] ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x20]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], -v[8:9]
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], -v[8:9] ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x40]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], -v[2:3], -v[8:9]
// GFX1250: v_fmac_f64_e64 v[4:5], -v[2:3], -v[8:9] ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x60]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], |v[2:3]|, v[8:9]
// GFX1250: v_fmac_f64_e64 v[4:5], |v[2:3]|, v[8:9] ; encoding: [0x04,0x01,0x17,0xd5,0x02,0x11,0x02,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], |v[8:9]|
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], |v[8:9]| ; encoding: [0x04,0x02,0x17,0xd5,0x02,0x11,0x02,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], |v[2:3]|, |v[8:9]|
// GFX1250: v_fmac_f64_e64 v[4:5], |v[2:3]|, |v[8:9]| ; encoding: [0x04,0x03,0x17,0xd5,0x02,0x11,0x02,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[8:9] clamp
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] clamp ; encoding: [0x04,0x80,0x17,0xd5,0x02,0x11,0x02,0x00]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[8:9] mul:2
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] mul:2 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x08]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[8:9] mul:4
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] mul:4 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x10]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmac_f64 v[4:5], v[2:3], v[8:9] div:2
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] div:2 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x18]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

v_fmamk_f64 v[6:7], v[4:5], 0x405ec000, v[2:3]
// GFX1250: v_fmamk_f64 v[6:7], v[4:5], 0x405ec000, v[2:3] ; encoding: [0x04,0x05,0x0c,0x46,0x00,0x00,0x00,0x00,0x00,0xc0,0x5e,0x40]
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
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