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[msan] Re-fix disjoint OR instrumentation from #145990 #148760

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Merged
merged 4 commits into from
Jul 15, 2025
Merged

[msan] Re-fix disjoint OR instrumentation from #145990 #148760

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1a9d1b5
[msan] Re-fix disjoint OR instrumentation from #145990
thurstond Jul 14, 2025
a8bfd6b
Fully auto-gen
thurstond Jul 15, 2025
7eccd15
Remove stray comment
thurstond Jul 15, 2025
eb4cb55
Merge branch 'main' into msan_disjoint_or_more
thurstond Jul 15, 2025
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10 changes: 6 additions & 4 deletions llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2509,9 +2509,9 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
//
// S = (S1 & S2) | (~V1 & S2) | (S1 & ~V2)
//
// Addendum if the "Or" is "disjoint":
// 1|1 => p;
// S = S | (V1 & V2)
// If the "disjoint OR" property is violated, the result is poison, and
// hence the entire shadow is uninitialized:
// S = S | SignExt(V1 & V2 != 0)
Value *S1 = getShadow(&I, 0);
Value *S2 = getShadow(&I, 1);
Value *V1 = I.getOperand(0);
Expand All @@ -2532,7 +2532,9 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {

if (ClPreciseDisjointOr && cast<PossiblyDisjointInst>(&I)->isDisjoint()) {
Value *V1V2 = IRB.CreateAnd(V1, V2);
S = IRB.CreateOr(S, V1V2, "_ms_disjoint");
Value *DisjointOrShadow = IRB.CreateSExt(
IRB.CreateICmpNE(V1V2, getCleanShadow(V1V2)), V1V2->getType());
S = IRB.CreateOr(S, DisjointOrShadow, "_ms_disjoint");
}

setShadow(&I, S);
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14 changes: 8 additions & 6 deletions llvm/test/Instrumentation/MemorySanitizer/or.ll
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@@ -1,4 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; NOTE: Assertions have mostly been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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@fmayer fmayer Jul 15, 2025

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which part is not autogenerated?

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@thurstond thurstond Jul 15, 2025

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The auto-generator will duplicate lines between CHECK-PRECISE and CHECK-IMPRECISE, instead of putting common lines into CHECK.

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@fmayer fmayer Jul 15, 2025

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Let it do that maybe? Then whoever wants to autogenerate this in the future isn't confused by the stray diff

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@thurstond thurstond Jul 15, 2025

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Done: a8bfd6b

We need to upgrade AutoGen to AGI.

; RUN: opt < %s -S -passes=msan -msan-precise-disjoint-or=false 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-IMPRECISE
; RUN: opt < %s -S -passes=msan -msan-precise-disjoint-or=true 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-PRECISE
;
Expand Down Expand Up @@ -40,15 +40,17 @@ define i8 @test_disjoint_or(i8 %a, i8 %b) sanitize_memory {
; CHECK-NEXT: [[TMP6:%.*]] = and i8 [[TMP3]], [[TMP2]]
; CHECK-NEXT: [[TMP7:%.*]] = and i8 [[TMP1]], [[TMP4]]
; CHECK-NEXT: [[TMP8:%.*]] = or i8 [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[TMP11:%.*]] = or i8 [[TMP8]], [[TMP7]]
; CHECK-NEXT: [[TMP9:%.*]] = or i8 [[TMP8]], [[TMP7]]
;
; CHECK-IMPRECISE: [[C:%.*]] = or disjoint i8 [[A]], [[B]]
; CHECK-IMPRECISE-NEXT: store i8 [[TMP11]], ptr @__msan_retval_tls, align 8
; CHECK-IMPRECISE-NEXT: store i8 [[TMP9]], ptr @__msan_retval_tls, align 8
;
; CHECK-PRECISE: [[TMP10:%.*]] = and i8 [[A]], [[B]]
; CHECK-PRECISE-NEXT: [[TMP12:%.*]] = or i8 [[TMP11]], [[TMP10]]
; CHECK-PRECISE-NEXT: [[TMP10:%.*]] = and i8 [[A]], [[B]]
; CHECK-PRECISE-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP10]], 0
; CHECK-PRECISE-NEXT: [[TMP12:%.*]] = sext i1 [[TMP11]] to i8
; CHECK-PRECISE-NEXT: [[_MS_DISJOINT:%.*]] = or i8 [[TMP9]], [[TMP12]]
; CHECK-PRECISE-NEXT: [[C:%.*]] = or disjoint i8 [[A]], [[B]]
; CHECK-PRECISE-NEXT: store i8 [[TMP12]], ptr @__msan_retval_tls, align 8
; CHECK-PRECISE-NEXT: store i8 [[_MS_DISJOINT]], ptr @__msan_retval_tls, align 8
;
; CHECK-NEXT: ret i8 [[C]]
;
Expand Down
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