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91 changes: 91 additions & 0 deletions llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
#include "llvm/ADT/SmallString.h"
#include "llvm/Analysis/DXILMetadataAnalysis.h"
#include "llvm/Analysis/DXILResource.h"
#include "llvm/BinaryFormat/DXContainer.h"
#include "llvm/Frontend/HLSL/RootSignatureValidations.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/Instructions.h"
Expand Down Expand Up @@ -295,6 +296,94 @@ getRootSignature(RootSignatureBindingInfo &RSBI,
return RootSigDesc;
}

static void
reportOverlappingRegisters(Module &M,
llvm::hlsl::rootsig::OverlappingRanges Overlap) {
const llvm::hlsl::rootsig::RangeInfo *Info = Overlap.A;
const llvm::hlsl::rootsig::RangeInfo *OInfo = Overlap.B;
SmallString<128> Message;
raw_svector_ostream OS(Message);
OS << "register " << ResourceClassToString(Info->Class)
<< " (space=" << Info->Space << ", register=" << Info->LowerBound << ")"
<< " is overlapping with"
<< " register " << ResourceClassToString(OInfo->Class)
<< " (space=" << OInfo->Space << ", register=" << OInfo->LowerBound << ")"
<< ", verify your root signature definition.";

M.getContext().diagnose(DiagnosticInfoGeneric(Message));
}

static bool reportOverlappingRanges(Module &M,
const mcdxbc::RootSignatureDesc &RSD) {
using namespace llvm::hlsl::rootsig;

llvm::SmallVector<RangeInfo> Infos;

for (size_t I = 0; I < RSD.ParametersContainer.size(); I++) {
const auto &[Type, Loc] =
RSD.ParametersContainer.getTypeAndLocForParameter(I);
const auto &Header = RSD.ParametersContainer.getHeader(I);
switch (Type) {
case llvm::to_underlying(dxbc::RootParameterType::Constants32Bit): {
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Rather than using llvm::to_underlying if you convert the int to the enum early (and handle the case where it doesn't match), the compiler will make sure you have full switch coverage.

That's definitely the better pattern to use for cases like this.

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I filed an issue to clean up this pattern across the DX backend. We really shouldn't be writing switch statements like this. The issue is #150676.

dxbc::RTS0::v1::RootConstants Const =
RSD.ParametersContainer.getConstant(Loc);

RangeInfo Info;
Info.Space = Const.RegisterSpace;
Info.LowerBound = Const.ShaderRegister;
Info.UpperBound = Info.LowerBound;
Info.Class = ParameterToResourceClass(Type);
Info.Visibility = (dxbc::ShaderVisibility)Header.ShaderVisibility;

Infos.push_back(Info);
break;
}
case llvm::to_underlying(dxbc::RootParameterType::SRV):
case llvm::to_underlying(dxbc::RootParameterType::UAV):
case llvm::to_underlying(dxbc::RootParameterType::CBV): {
dxbc::RTS0::v2::RootDescriptor Desc =
RSD.ParametersContainer.getRootDescriptor(Loc);

RangeInfo Info;
Info.Space = Desc.RegisterSpace;
Info.LowerBound = Desc.ShaderRegister;
Info.UpperBound = Info.LowerBound;
Info.Class = ParameterToResourceClass(Type);
Info.Visibility = (dxbc::ShaderVisibility)Header.ShaderVisibility;

Infos.push_back(Info);
break;
}
case llvm::to_underlying(dxbc::RootParameterType::DescriptorTable): {
const mcdxbc::DescriptorTable &Table =
RSD.ParametersContainer.getDescriptorTable(Loc);

for (const dxbc::RTS0::v2::DescriptorRange &Range : Table.Ranges) {
assert(Range.NumDescriptors > 0);
RangeInfo Info;
Info.Space = Range.RegisterSpace;
Info.LowerBound = Range.BaseShaderRegister;
Info.UpperBound = Info.LowerBound + ((Range.NumDescriptors == ~0U)
? Range.NumDescriptors
: Range.NumDescriptors - 1);
Info.Class = RangeToResourceClass(Range.RangeType);
Info.Visibility = (dxbc::ShaderVisibility)Header.ShaderVisibility;

Infos.push_back(Info);
}
break;
}
}
}

llvm::SmallVector<OverlappingRanges> Overlaps =
llvm::hlsl::rootsig::findOverlappingRanges(Infos);
for (OverlappingRanges Overlap : Overlaps)
reportOverlappingRegisters(M, Overlap);

return Overlaps.size() > 0;
}

static void reportInvalidHandleTy(
Module &M, const llvm::ArrayRef<dxil::ResourceInfo::ResourceBinding> &RDs,
const iterator_range<SmallVectorImpl<dxil::ResourceInfo>::iterator>
Expand Down Expand Up @@ -359,6 +448,8 @@ static void reportErrors(Module &M, DXILResourceMap &DRM,
"DXILResourceImplicitBinding pass");

if (auto RSD = getRootSignature(RSBI, MMI)) {
if (reportOverlappingRanges(M, *RSD))
return;
dxbc::ShaderVisibility Visibility = tripleToVisibility(MMI.ShaderProfile);
llvm::hlsl::rootsig::RootSignatureBindingValidation Validation =
initRSBindingValidation(*RSD, Visibility);
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s
; CHECK: error: register CBuffer (space=0, register=0) is overlapping with register CBuffer (space=0, register=2), verify your root signature definition

define void @CSMain() "hlsl.shader"="compute" {
entry:
ret void
}

; RootConstants(num32BitConstants=4, b2), DescriptorTable(CBV(b0, numDescriptors=3))
!dx.rootsignatures = !{!0}
!0 = !{ptr @CSMain, !1, i32 2}
!1 = !{!2, !3}
!2 = !{!"RootConstants", i32 0, i32 2, i32 0, i32 4}
!3 = !{!"DescriptorTable", i32 0, !4}
!4 = !{!"CBV", i32 3, i32 0, i32 0, i32 -1, i32 4}
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s
; CHECK: error: register UAV (space=0, register=2) is overlapping with register UAV (space=0, register=0), verify your root signature definition

define void @CSMain() "hlsl.shader"="compute" {
entry:
ret void
}

; DescriptorTable(UAV(u0, numDescriptors=unbounded), visibility = SHADER_VISIBILITY_HULL), DescriptorTable(UAV(u2, numDescriptors=4))
!dx.rootsignatures = !{!0}
!0 = !{ptr @CSMain, !1, i32 2}
!1 = !{!2, !4}
!2 = !{!"DescriptorTable", i32 2, !3}
!3 = !{!"UAV", i32 -1, i32 0, i32 0, i32 -1, i32 2}
!4 = !{!"DescriptorTable", i32 0, !5}
!5 = !{!"UAV", i32 4, i32 2, i32 0, i32 -1, i32 2}
Original file line number Diff line number Diff line change
Expand Up @@ -9,9 +9,7 @@

define void @CSMain() "hlsl.shader"="compute" {
entry:

%TB = tail call target("dx.Texture", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @TB.str)

ret void
}

Expand Down
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