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[mlir][NFC] update mlir/Dialect create APIs (15/n)
#149921
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[mlir][NFC] update mlir/Dialect create APIs (15/n)
#149921
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✅ With the latest revision this PR passed the C/C++ code formatter. |
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@llvm/pr-subscribers-mlir @llvm/pr-subscribers-mlir-bufferization Author: Maksim Levental (makslevental) ChangesSee #147168 for more info. Patch is 137.42 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/149921.diff 25 Files Affected:
diff --git a/mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp b/mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
index a07be7801869f..2b80441b33309 100644
--- a/mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
+++ b/mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
@@ -229,8 +229,9 @@ class LowerContractionToNeonI8MMPattern
// Initial accumulator for the final result. This is the un-tiled result if
// tiling is done.
- Value result = rewriter.create<arith::ConstantOp>(
- loc, op.getResultType(), rewriter.getZeroAttr(op.getResultType()));
+ Value result =
+ arith::ConstantOp::create(rewriter, loc, op.getResultType(),
+ rewriter.getZeroAttr(op.getResultType()));
SmallVector<int64_t> unrolledSize = *op.getShapeForUnroll();
SmallVector<int64_t> smmlaShape = {2, 8};
@@ -281,8 +282,9 @@ class LowerContractionToNeonI8MMPattern
if (isVecmat) {
auto expandForSMMLA = [&](Value tiledOperand,
VectorType expandedTypeType) {
- auto emptyOperand = rewriter.create<arith::ConstantOp>(
- loc, expandedTypeType, rewriter.getZeroAttr(expandedTypeType));
+ auto emptyOperand =
+ arith::ConstantOp::create(rewriter, loc, expandedTypeType,
+ rewriter.getZeroAttr(expandedTypeType));
SmallVector<int64_t> offsets(
cast<ShapedType>(emptyOperand.getType()).getRank(), 0);
SmallVector<int64_t> strides(
@@ -298,8 +300,8 @@ class LowerContractionToNeonI8MMPattern
// using the instruction for unsigned by signed multiplication with
// reversed operands.
if (mmlaOp == MMLA::MixedSwapped)
- tiledAcc = rewriter.create<vector::TransposeOp>(
- loc, tiledAcc, ArrayRef<int64_t>({1, 0}));
+ tiledAcc = vector::TransposeOp::create(rewriter, loc, tiledAcc,
+ ArrayRef<int64_t>({1, 0}));
// Collapse tiled operands to 1D vectors required by smmla intrinsic
auto collapsedInputType =
@@ -331,8 +333,8 @@ class LowerContractionToNeonI8MMPattern
// Because of the reversed operands the result is obtained transposed.
// Transpose it back,
if (mmlaOp == MMLA::MixedSwapped)
- tiledRes = rewriter.create<vector::TransposeOp>(
- loc, tiledRes, ArrayRef<int64_t>({1, 0}));
+ tiledRes = vector::TransposeOp::create(rewriter, loc, tiledRes,
+ ArrayRef<int64_t>({1, 0}));
// With vecmat, only one row of tiled ACC can be inserted into the final
// result
diff --git a/mlir/lib/Dialect/ArmSME/IR/Utils.cpp b/mlir/lib/Dialect/ArmSME/IR/Utils.cpp
index 5f00cef90159e..e5e1312f0eb04 100644
--- a/mlir/lib/Dialect/ArmSME/IR/Utils.cpp
+++ b/mlir/lib/Dialect/ArmSME/IR/Utils.cpp
@@ -75,21 +75,21 @@ scf::ForOp createLoopOverTileSlices(
PatternRewriter &rewriter, Location loc, Value initTile,
std::function<Value(OpBuilder &, Location, Value, Value)> makeLoopBody) {
OpBuilder::InsertionGuard g(rewriter);
- auto step = rewriter.create<arith::ConstantIndexOp>(loc, 1);
- auto minTileSlices = rewriter.create<arith::ConstantIndexOp>(
- loc, llvm::cast<VectorType>(initTile.getType()).getDimSize(0));
+ auto step = arith::ConstantIndexOp::create(rewriter, loc, 1);
+ auto minTileSlices = arith::ConstantIndexOp::create(
+ rewriter, loc, llvm::cast<VectorType>(initTile.getType()).getDimSize(0));
auto vscale =
- rewriter.create<vector::VectorScaleOp>(loc, rewriter.getIndexType());
- auto lowerBound = rewriter.create<arith::ConstantIndexOp>(loc, 0);
+ vector::VectorScaleOp::create(rewriter, loc, rewriter.getIndexType());
+ auto lowerBound = arith::ConstantIndexOp::create(rewriter, loc, 0);
auto numTileSlices =
- rewriter.create<arith::MulIOp>(loc, minTileSlices, vscale);
- auto forOp = rewriter.create<scf::ForOp>(loc, lowerBound, numTileSlices, step,
- ValueRange{initTile});
+ arith::MulIOp::create(rewriter, loc, minTileSlices, vscale);
+ auto forOp = scf::ForOp::create(rewriter, loc, lowerBound, numTileSlices,
+ step, ValueRange{initTile});
rewriter.setInsertionPointToStart(forOp.getBody());
Value nextTile =
makeLoopBody(rewriter, loc, /*tileSliceIndex=*/forOp.getInductionVar(),
/*currentTile=*/forOp.getRegionIterArg(0));
- rewriter.create<scf::YieldOp>(loc, nextTile);
+ scf::YieldOp::create(rewriter, loc, nextTile);
return forOp;
}
diff --git a/mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp b/mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
index 23f2c2bf65e47..9bf026563c255 100644
--- a/mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
+++ b/mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
@@ -136,7 +136,7 @@ class OuterProductFusion2Way
auto loc = op.getLoc();
auto packInputs = [&](Value lhs, Value rhs) {
- return rewriter.create<vector::InterleaveOp>(loc, lhs, rhs);
+ return vector::InterleaveOp::create(rewriter, loc, lhs, rhs);
};
auto lhs = packInputs(op1.getLhs().getDefiningOp()->getOperand(0),
@@ -284,7 +284,7 @@ class OuterProductFusion4Way
auto loc = op.getLoc();
auto packInputs = [&](Value lhs, Value rhs) {
- return rewriter.create<vector::InterleaveOp>(loc, lhs, rhs);
+ return vector::InterleaveOp::create(rewriter, loc, lhs, rhs);
};
auto lhs0 = packInputs(op1.getLhs().getDefiningOp()->getOperand(0),
@@ -456,8 +456,8 @@ struct SwapVectorExtractOfArithExtend
Value extendSource = extendOp->getOperand(0);
// Create new extract from source of extend.
- Value newExtract = rewriter.create<vector::ExtractOp>(
- loc, extendSource, extractOp.getMixedPosition());
+ Value newExtract = vector::ExtractOp::create(rewriter, loc, extendSource,
+ extractOp.getMixedPosition());
// Extend new extract to original result type.
Operation *newExtend =
@@ -503,8 +503,9 @@ struct SwapVectorScalableExtractOfArithExtend
// Create new extract from source of extend.
VectorType extractResultVectorType =
resultType.clone(extendSourceVectorType.getElementType());
- Value newExtract = rewriter.create<vector::ScalableExtractOp>(
- loc, extractResultVectorType, extendSource, extractOp.getPos());
+ Value newExtract = vector::ScalableExtractOp::create(
+ rewriter, loc, extractResultVectorType, extendSource,
+ extractOp.getPos());
// Extend new extract to original result type.
Operation *newExtend =
diff --git a/mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp b/mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
index b3c988d455420..d925c19852679 100644
--- a/mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
+++ b/mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
@@ -210,7 +210,7 @@ void splitCondBranches(IRRewriter &rewriter, FunctionOpInterface function) {
auto insertJump = [&](Location loc, Block *source, Block *dest, auto args) {
rewriter.setInsertionPointToEnd(source);
- rewriter.create<cf::BranchOp>(loc, dest, args);
+ cf::BranchOp::create(rewriter, loc, dest, args);
};
for (auto condBranch : worklist) {
@@ -253,7 +253,7 @@ void insertCopiesAtBranches(IRRewriter &rewriter,
for (OpOperand &operand : terminator->getOpOperands()) {
if (isValidSMETileVectorType(operand.get().getType())) {
auto copy =
- rewriter.create<CopyTileOp>(terminator->getLoc(), operand.get());
+ CopyTileOp::create(rewriter, terminator->getLoc(), operand.get());
rewriter.modifyOpInPlace(terminator, [&] { operand.assign(copy); });
}
}
diff --git a/mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp b/mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
index 1e8e1265affa0..1c0eced43dc00 100644
--- a/mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
+++ b/mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
@@ -82,13 +82,14 @@ SmallVector<Value, 2> addConstantScalableOffset(OpBuilder &builder,
Location loc,
ValueRange indices,
ArrayRef<int> scalableOffsets) {
- auto vscale = builder.create<vector::VectorScaleOp>(loc);
+ auto vscale = vector::VectorScaleOp::create(builder, loc);
return llvm::map_to_vector(
llvm::zip_equal(indices, scalableOffsets), [&](auto pair) -> Value {
auto [index, base] = pair;
- auto offset = builder.create<arith::MulIOp>(
- loc, builder.create<arith::ConstantIndexOp>(loc, base), vscale);
- return builder.create<arith::AddIOp>(loc, index, offset);
+ auto offset = arith::MulIOp::create(
+ builder, loc, arith::ConstantIndexOp::create(builder, loc, base),
+ vscale);
+ return arith::AddIOp::create(builder, loc, index, offset);
});
}
@@ -132,8 +133,8 @@ Value extractSMEMask(OpBuilder &builder, Location loc, Value mask,
// from the mask operands to get the parameters for this sub-tile.
auto smeTileMaskDims = addConstantScalableOffset(
builder, loc, createMask.getOperands(), {-smeTile.row, -smeTile.col});
- auto smeTileCreateMask = builder.create<vector::CreateMaskOp>(
- loc, smeTile.type.clone(builder.getI1Type()), smeTileMaskDims);
+ auto smeTileCreateMask = vector::CreateMaskOp::create(
+ builder, loc, smeTile.type.clone(builder.getI1Type()), smeTileMaskDims);
return smeTileCreateMask.getResult();
}
@@ -190,8 +191,8 @@ struct LegalizeArithConstantOpsByDecomposition
auto smeTileType = getSMETileTypeForElement(vectorType.getElementType());
auto tileCount = getNumberOfSMETilesForVectorType(vectorType);
- auto tileSplat = rewriter.create<arith::ConstantOp>(
- constantOp.getLoc(), denseAttr.resizeSplat(smeTileType));
+ auto tileSplat = arith::ConstantOp::create(
+ rewriter, constantOp.getLoc(), denseAttr.resizeSplat(smeTileType));
SmallVector<Value> repl(tileCount, tileSplat);
rewriter.replaceOpWithMultiple(constantOp, {repl});
@@ -237,12 +238,12 @@ struct LegalizeVectorOuterProductOpsByDecomposition
decomposeToSMETiles(rewriter, vectorType, smeTileType))) {
auto smeMask = extractSMEMask(rewriter, loc, mask, smeTile);
- auto lhs = rewriter.create<vector::ScalableExtractOp>(
- loc, sliceType, outerProductOp.getLhs(), smeTile.row);
- auto rhs = rewriter.create<vector::ScalableExtractOp>(
- loc, sliceType, outerProductOp.getRhs(), smeTile.col);
- auto smeOuterProduct = rewriter.create<vector::OuterProductOp>(
- loc, smeTileType, lhs, rhs,
+ auto lhs = vector::ScalableExtractOp::create(
+ rewriter, loc, sliceType, outerProductOp.getLhs(), smeTile.row);
+ auto rhs = vector::ScalableExtractOp::create(
+ rewriter, loc, sliceType, outerProductOp.getRhs(), smeTile.col);
+ auto smeOuterProduct = vector::OuterProductOp::create(
+ rewriter, loc, smeTileType, lhs, rhs,
!accSMETiles.empty() ? accSMETiles[index] : Value{},
outerProductOp.getKind());
@@ -314,8 +315,8 @@ struct LegalizeTransferReadOpsByDecomposition
for (SMESubTile smeTile :
decomposeToSMETiles(rewriter, vectorType, smeTileType, transposed)) {
auto smeMask = extractSMEMask(rewriter, loc, mask, smeTile);
- auto smeRead = rewriter.create<vector::TransferReadOp>(
- loc, smeTileType, readOp.getBase(),
+ auto smeRead = vector::TransferReadOp::create(
+ rewriter, loc, smeTileType, readOp.getBase(),
getSMESubTileIndices(rewriter, loc, readOp.getIndices(), smeTile),
readOp.getPermutationMapAttr(), readOp.getPadding(), smeMask,
readOp.getInBoundsAttr());
@@ -363,8 +364,8 @@ struct LegalizeTransferWriteOpsByDecomposition
for (auto [index, smeTile] : llvm::enumerate(decomposeToSMETiles(
rewriter, vectorType, smeTileType, transposed))) {
auto smeMask = extractSMEMask(rewriter, loc, mask, smeTile);
- auto smeWrite = rewriter.create<vector::TransferWriteOp>(
- loc, inputSMETiles[index], destTensorOrMemref,
+ auto smeWrite = vector::TransferWriteOp::create(
+ rewriter, loc, inputSMETiles[index], destTensorOrMemref,
getSMESubTileIndices(rewriter, loc, writeOp.getIndices(), smeTile),
writeOp.getPermutationMapAttr(), smeMask, writeOp.getInBoundsAttr());
if (writeOp.hasPureTensorSemantics())
@@ -456,11 +457,11 @@ struct LegalizeMultiTileTransferWriteAsStoreLoop
VectorType::get(minTileSlices, rewriter.getI1Type(), true);
// Create loop over all tile slices.
- auto lowerBound = rewriter.create<arith::ConstantIndexOp>(loc, 0);
+ auto lowerBound = arith::ConstantIndexOp::create(rewriter, loc, 0);
auto upperBound = createVscaleMultiple(minTileSlices);
- auto step = rewriter.create<arith::ConstantIndexOp>(loc, 1);
+ auto step = arith::ConstantIndexOp::create(rewriter, loc, 1);
auto storeLoop =
- rewriter.create<scf::ForOp>(loc, lowerBound, upperBound, step);
+ scf::ForOp::create(rewriter, loc, lowerBound, upperBound, step);
rewriter.setInsertionPointToStart(storeLoop.getBody());
// For each sub-tile of the multi-tile `vectorType`.
@@ -474,30 +475,31 @@ struct LegalizeMultiTileTransferWriteAsStoreLoop
// The current slice of `vectorType` we are processing.
auto sliceIndex =
- rewriter.create<arith::AddIOp>(loc, tileRow, tileSliceIndex);
+ arith::AddIOp::create(rewriter, loc, tileRow, tileSliceIndex);
// Where in the destination memref the current slice will be stored.
- auto storeRow = rewriter.create<arith::AddIOp>(loc, sliceIndex,
- writeOp.getIndices()[0]);
- auto storeCol =
- rewriter.create<arith::AddIOp>(loc, tileCol, writeOp.getIndices()[1]);
+ auto storeRow = arith::AddIOp::create(rewriter, loc, sliceIndex,
+ writeOp.getIndices()[0]);
+ auto storeCol = arith::AddIOp::create(rewriter, loc, tileCol,
+ writeOp.getIndices()[1]);
// Extract the mask for the current slice.
Value sliceMask = nullptr;
if (mask) {
- sliceMask = rewriter.create<vector::ExtractOp>(
- loc, mask, OpFoldResult(sliceIndex));
+ sliceMask = vector::ExtractOp::create(rewriter, loc, mask,
+ OpFoldResult(sliceIndex));
if (sliceMaskType != sliceMask.getType())
- sliceMask = rewriter.create<vector::ScalableExtractOp>(
- loc, sliceMaskType, sliceMask, smeTile.col);
+ sliceMask = vector::ScalableExtractOp::create(
+ rewriter, loc, sliceMaskType, sliceMask, smeTile.col);
}
// Extract and store the current slice.
Value tile = inputSMETiles[index];
auto slice =
- rewriter.create<vector::ExtractOp>(loc, tile, tileSliceIndex);
- rewriter.create<vector::TransferWriteOp>(
- loc, slice, writeOp.getBase(), ValueRange{storeRow, storeCol},
+ vector::ExtractOp::create(rewriter, loc, tile, tileSliceIndex);
+ vector::TransferWriteOp::create(
+ rewriter, loc, slice, writeOp.getBase(),
+ ValueRange{storeRow, storeCol},
AffineMapAttr::get(writeOp.getPermutationMap().dropResult(0)),
sliceMask,
rewriter.getBoolArrayAttr(
@@ -567,14 +569,15 @@ struct FoldExtractFromVectorOfSMELikeCreateMasks
extractOp,
"constant vector.create_masks dims should be folded elsewhere");
- auto zero = rewriter.create<arith::ConstantIndexOp>(loc, 0);
+ auto zero = arith::ConstantIndexOp::create(rewriter, loc, 0);
auto extractionIndex = getValueOrCreateConstantIndexOp(
rewriter, loc, extractOp.getMixedPosition()[0]);
- auto extractionInTrueRegion = rewriter.create<arith::CmpIOp>(
- loc, rewriter.getI1Type(), arith::CmpIPredicate::slt, extractionIndex,
- frontMaskDim);
- auto newMaskFrontDim = rewriter.create<arith::SelectOp>(
- loc, extractionInTrueRegion, createMaskOp.getOperand(1), zero);
+ auto extractionInTrueRegion = arith::CmpIOp::create(
+ rewriter, loc, rewriter.getI1Type(), arith::CmpIPredicate::slt,
+ extractionIndex, frontMaskDim);
+ auto newMaskFrontDim =
+ arith::SelectOp::create(rewriter, loc, extractionInTrueRegion,
+ createMaskOp.getOperand(1), zero);
rewriter.replaceOpWithNewOp<vector::CreateMaskOp>(
extractOp, extractedMaskType,
@@ -660,8 +663,8 @@ struct LiftIllegalVectorTransposeToMemory
illegalRead, "expected read to have identity permutation map");
auto loc = transposeOp.getLoc();
- auto zero = rewriter.create<arith::ConstantIndexOp>(loc, 0);
- auto one = rewriter.create<arith::ConstantIndexOp>(loc, 1);
+ auto zero = arith::ConstantIndexOp::create(rewriter, loc, 0);
+ auto one = arith::ConstantIndexOp::create(rewriter, loc, 1);
// Create a subview that matches the size of the illegal read vector type.
auto readType = illegalRead.getVectorType();
@@ -669,16 +672,16 @@ struct LiftIllegalVectorTransposeToMemory
llvm::zip_equal(readType.getShape(), readType.getScalableDims()),
[&](auto dim) -> Value {
auto [size, isScalable] = dim;
- auto dimSize = rewriter.create<arith::ConstantIndexOp>(loc, size);
+ auto dimSize = arith::ConstantIndexOp::create(rewriter, loc, size);
if (!isScalable)
return dimSize;
- auto vscale = rewriter.create<vector::VectorScaleOp>(loc);
- return rewriter.create<arith::MulIOp>(loc, vscale, dimSize);
+ auto vscale = vector::VectorScaleOp::create(rewriter, loc);
+ return arith::MulIOp::create(rewriter, loc, vscale, dimSize);
});
SmallVector<Value> strides(readType.getRank(), Value(one));
- auto readSubview = rewriter.create<memref::SubViewOp>(
- loc, illegalRead.getBase(), illegalRead.getIndices(), readSizes,
- strides);
+ auto readSubview =
+ memref::SubViewOp::create(rewriter, loc, illegalRead.getBase(),
+ illegalRead.getIndices(), readSizes, strides);
// Apply the transpose to all values/attributes of the transfer_read:
// - The mask
@@ -686,14 +689,14 @@ struct LiftIllegalVectorTransposeToMemory
if (mask) {
// Note: The transpose for the mask should fold into the
// vector.create_mask/constant_mask op, which will then become legal.
- mask = rewriter.create<vector::TransposeOp>(loc, mask,
- transposeOp.getPermutation());
+ mask = vector::TransposeOp::create(rewriter, loc, mask,
+ transposeOp.getPermutation());
}
// - The source memref
mlir::AffineMap transposeMap = AffineMap::getPermutationMap(
transposeOp.getPermutation(), getContext());
- auto transposedSubview = rewriter.create<memref::TransposeOp>(
- loc, readSubview, AffineMapAttr::get(transposeMap));
+ auto transposedSubview = memref::TransposeOp::create(
+ rewriter, loc, readSubview, AffineMapAttr::get(transposeMap));
ArrayAttr inBoundsAttr = illegalRead.getInBoundsAttr();
// - The `in_bounds` attribute
if (inBoundsAttr) {
@@ -706,8 +709,8 @@ struct LiftIllegalVectorTransposeToMemory
VectorType legalReadType = resultType.clone(readType.getElementType());
// Note: The indices are all zero as the subview is already offset.
SmallVector<Value> readIndices(illegalRead.getIndices().size(), zero);
- auto legalRead = rewriter.create<vector::TransferReadOp>(
- loc, legalReadType, transposedSubview, readIndices,
+ auto legalRead = vector::TransferReadOp::create(
+ rewriter, loc, legal...
[truncated]
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LGTM (Also, great work!). As I'm not a maintainer really, I'd avoid approving (at least before there's an approval from someone more involved with the project).
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ping |
See llvm#147168 for more info.
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Taken from git history: 9e7834c Maksim Levental [mlir][NFC] update `mlir/lib` create APIs (35/n) (#150708) 284a5c2 Maksim Levental [mlir][NFC] update `mlir/examples` create APIs (31/n) (#150652) c090ed5 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (33/n) (#150659) fcbcfe4 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (32/n) (#150657) 258daf5 Maksim Levental [mlir][NFC] update `mlir` create APIs (34/n) (#150660) c610b24 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (27/n) (#150638) b58ad36 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (30/n) (#150643) 258d04c Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (28/n) (#150641) a6bf40d Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (29/n) (#150642) dcfc853 Maksim Levental [mlir][NFC] update `flang/lib` create APIs (12/n) (#149914) 3f74334 Maksim Levental [mlir][NFC] update `flang` create APIs (13/n) (#149913) a636b7b Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (18/n) (#149925) 75aa706 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (17/n) (#149924) 2f53125 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (15/n) (#149921) 967626b Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (14/n) (#149920) 588845d Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (20/n) (#149927) b043492 Maksim Levental [mlir][NFC] update `Conversion` create APIs (4/n) (#149879) 8fff238 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (23/n) (#149930) 38976a0 Maksim Levental [mlir][NFC] update `Conversion` create APIs (7/n) (#149889) eaa67a3 Maksim Levental [mlir][NFC] update `Conversion` create APIs (5/n) (#149887) b0312be Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (19/n) (#149926) 2736fbd Maksim Levental [mlir][NFC] update `mlir/lib` create APIs (26/n) (#149933) 4ae9fdc Maksim Levental [mlir][NFC] update `Conversion` create APIs (6/n) (#149888) f904cdd Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (24/n) (#149931) 972ac59 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (21/n) (#149928) 7b78796 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (25/n) (#149932) c3823af Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (22/n) (#149929) dce6679 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (16/n) (#149922) 9844ba6 Maksim Levental [mlir][NFC] update `flang/Optimizer/Builder` create APIs (9/n) (#149917) 5547c6c Maksim Levental [mlir][NFC] update `flang/Optimizer/Builder/Runtime` create APIs (10/n) (#149916) a3a007a Maksim Levental [mlir][NFC] update `flang/Lower` create APIs (8/n) (#149912) 46f6df0 Maksim Levental [mlir][NFC] update `flang/Optimizer/Transforms` create APIs (11/n) (#149915) b7e332d Maksim Levental [mlir][NFC] update `include` create APIs (3/n) (#149687) 6056f94 Maksim Levental [mlir][NFC] update LLVM create APIs (2/n) (#149667) 906295b Maksim Levental [mlir] update affine+arith create APIs (1/n) (#149656)
The update is most likely not what someone wants when looking at the blame for one of these lines. Taken from git history: ``` 9e7834c Maksim Levental [mlir][NFC] update `mlir/lib` create APIs (35/n) (#150708) 284a5c2 Maksim Levental [mlir][NFC] update `mlir/examples` create APIs (31/n) (#150652) c090ed5 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (33/n) (#150659) fcbcfe4 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (32/n) (#150657) 258daf5 Maksim Levental [mlir][NFC] update `mlir` create APIs (34/n) (#150660) c610b24 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (27/n) (#150638) b58ad36 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (30/n) (#150643) 258d04c Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (28/n) (#150641) a6bf40d Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (29/n) (#150642) dcfc853 Maksim Levental [mlir][NFC] update `flang/lib` create APIs (12/n) (#149914) 3f74334 Maksim Levental [mlir][NFC] update `flang` create APIs (13/n) (#149913) a636b7b Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (18/n) (#149925) 75aa706 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (17/n) (#149924) 2f53125 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (15/n) (#149921) 967626b Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (14/n) (#149920) 588845d Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (20/n) (#149927) b043492 Maksim Levental [mlir][NFC] update `Conversion` create APIs (4/n) (#149879) 8fff238 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (23/n) (#149930) 38976a0 Maksim Levental [mlir][NFC] update `Conversion` create APIs (7/n) (#149889) eaa67a3 Maksim Levental [mlir][NFC] update `Conversion` create APIs (5/n) (#149887) b0312be Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (19/n) (#149926) 2736fbd Maksim Levental [mlir][NFC] update `mlir/lib` create APIs (26/n) (#149933) 4ae9fdc Maksim Levental [mlir][NFC] update `Conversion` create APIs (6/n) (#149888) f904cdd Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (24/n) (#149931) 972ac59 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (21/n) (#149928) 7b78796 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (25/n) (#149932) c3823af Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (22/n) (#149929) dce6679 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (16/n) (#149922) 9844ba6 Maksim Levental [mlir][NFC] update `flang/Optimizer/Builder` create APIs (9/n) (#149917) 5547c6c Maksim Levental [mlir][NFC] update `flang/Optimizer/Builder/Runtime` create APIs (10/n) (#149916) a3a007a Maksim Levental [mlir][NFC] update `flang/Lower` create APIs (8/n) (#149912) 46f6df0 Maksim Levental [mlir][NFC] update `flang/Optimizer/Transforms` create APIs (11/n) (#149915) b7e332d Maksim Levental [mlir][NFC] update `include` create APIs (3/n) (#149687) 6056f94 Maksim Levental [mlir][NFC] update LLVM create APIs (2/n) (#149667) 906295b Maksim Levental [mlir] update affine+arith create APIs (1/n) (#149656) ```
See llvm#147168 for more info.
The update is most likely not what someone wants when looking at the blame for one of these lines. Taken from git history: ``` 9e7834c Maksim Levental [mlir][NFC] update `mlir/lib` create APIs (35/n) (llvm#150708) 284a5c2 Maksim Levental [mlir][NFC] update `mlir/examples` create APIs (31/n) (llvm#150652) c090ed5 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (33/n) (llvm#150659) fcbcfe4 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (32/n) (llvm#150657) 258daf5 Maksim Levental [mlir][NFC] update `mlir` create APIs (34/n) (llvm#150660) c610b24 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (27/n) (llvm#150638) b58ad36 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (30/n) (llvm#150643) 258d04c Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (28/n) (llvm#150641) a6bf40d Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (29/n) (llvm#150642) dcfc853 Maksim Levental [mlir][NFC] update `flang/lib` create APIs (12/n) (llvm#149914) 3f74334 Maksim Levental [mlir][NFC] update `flang` create APIs (13/n) (llvm#149913) a636b7b Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (18/n) (llvm#149925) 75aa706 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (17/n) (llvm#149924) 2f53125 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (15/n) (llvm#149921) 967626b Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (14/n) (llvm#149920) 588845d Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (20/n) (llvm#149927) b043492 Maksim Levental [mlir][NFC] update `Conversion` create APIs (4/n) (llvm#149879) 8fff238 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (23/n) (llvm#149930) 38976a0 Maksim Levental [mlir][NFC] update `Conversion` create APIs (7/n) (llvm#149889) eaa67a3 Maksim Levental [mlir][NFC] update `Conversion` create APIs (5/n) (llvm#149887) b0312be Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (19/n) (llvm#149926) 2736fbd Maksim Levental [mlir][NFC] update `mlir/lib` create APIs (26/n) (llvm#149933) 4ae9fdc Maksim Levental [mlir][NFC] update `Conversion` create APIs (6/n) (llvm#149888) f904cdd Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (24/n) (llvm#149931) 972ac59 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (21/n) (llvm#149928) 7b78796 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (25/n) (llvm#149932) c3823af Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (22/n) (llvm#149929) dce6679 Maksim Levental [mlir][NFC] update `mlir/Dialect` create APIs (16/n) (llvm#149922) 9844ba6 Maksim Levental [mlir][NFC] update `flang/Optimizer/Builder` create APIs (9/n) (llvm#149917) 5547c6c Maksim Levental [mlir][NFC] update `flang/Optimizer/Builder/Runtime` create APIs (10/n) (llvm#149916) a3a007a Maksim Levental [mlir][NFC] update `flang/Lower` create APIs (8/n) (llvm#149912) 46f6df0 Maksim Levental [mlir][NFC] update `flang/Optimizer/Transforms` create APIs (11/n) (llvm#149915) b7e332d Maksim Levental [mlir][NFC] update `include` create APIs (3/n) (llvm#149687) 6056f94 Maksim Levental [mlir][NFC] update LLVM create APIs (2/n) (llvm#149667) 906295b Maksim Levental [mlir] update affine+arith create APIs (1/n) (llvm#149656) ```
See #147168 for more info.