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11 changes: 11 additions & 0 deletions llvm/lib/Target/AMDGPU/AMDGPU.td
Original file line number Diff line number Diff line change
Expand Up @@ -167,6 +167,12 @@ def FeatureMinimum3Maximum3F16 : SubtargetFeature<"minimum3-maximum3-f16",
"Has v_minimum3_f16 and v_maximum3_f16 instructions"
>;

def FeatureMin3Max3PKF16 : SubtargetFeature<"min3-max3-pkf16",
"HasMin3Max3PKF16",
"true",
"Has v_pk_min3_num_f16 and v_pk_max3_num_f16 instructions"
>;

def FeatureMinimum3Maximum3PKF16 : SubtargetFeature<"minimum3-maximum3-pkf16",
"HasMinimum3Maximum3PKF16",
"true",
Expand Down Expand Up @@ -2001,6 +2007,7 @@ def FeatureISAVersion12_50 : FeatureSet<
FeatureBF16ConversionInsts,
FeatureBF16PackedInsts,
FeatureCvtPkF16F32Inst,
FeatureMin3Max3PKF16,
FeatureMinimum3Maximum3PKF16,
FeaturePrngInst,
FeaturePermlane16Swap,
Expand Down Expand Up @@ -2361,6 +2368,10 @@ def HasMinimum3Maximum3F16 :
Predicate<"Subtarget->hasMinimum3Maximum3F16()">,
AssemblerPredicate<(all_of FeatureMinimum3Maximum3F16)>;

def HasMin3Max3PKF16 :
Predicate<"Subtarget->hasMin3Max3PKF16()">,
AssemblerPredicate<(all_of FeatureMin3Max3PKF16)>;

def HasMinimum3Maximum3PKF16 :
Predicate<"Subtarget->hasMinimum3Maximum3PKF16()">,
AssemblerPredicate<(all_of FeatureMinimum3Maximum3PKF16)>;
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/AMDGPU/GCNSubtarget.h
Original file line number Diff line number Diff line change
Expand Up @@ -265,6 +265,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
bool HasIEEEMinimumMaximumInsts = false;
bool HasMinimum3Maximum3F32 = false;
bool HasMinimum3Maximum3F16 = false;
bool HasMin3Max3PKF16 = false;
bool HasMinimum3Maximum3PKF16 = false;
bool HasLshlAddU64Inst = false;
bool HasAddSubU64Insts = false;
Expand Down Expand Up @@ -1388,6 +1389,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
return HasMinimum3Maximum3F16;
}

bool hasMin3Max3PKF16() const { return HasMin3Max3PKF16; }

bool hasTanhInsts() const { return HasTanhInsts; }

bool hasAddPC64Inst() const { return GFX1250Insts; }
Expand Down
3 changes: 2 additions & 1 deletion llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14068,7 +14068,8 @@ static bool supportsMin3Max3(const GCNSubtarget &Subtarget, unsigned Opc,
case ISD::FMAXIMUMNUM:
case AMDGPUISD::FMIN_LEGACY:
case AMDGPUISD::FMAX_LEGACY:
return (VT == MVT::f32) || (VT == MVT::f16 && Subtarget.hasMin3Max3_16());
return (VT == MVT::f32) || (VT == MVT::f16 && Subtarget.hasMin3Max3_16()) ||
(VT == MVT::v2f16 && Subtarget.hasMin3Max3PKF16());
case ISD::FMINIMUM:
case ISD::FMAXIMUM:
return (VT == MVT::f32 && Subtarget.hasMinimum3Maximum3F32()) ||
Expand Down
11 changes: 10 additions & 1 deletion llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Original file line number Diff line number Diff line change
Expand Up @@ -144,10 +144,17 @@ def : VOP3PSatPat<usubsat, V_PK_SUB_U16>;
def : VOP3PSatPat<ssubsat, V_PK_SUB_I16>;
} // End SubtargetPredicate = HasVOP3PInsts

let SubtargetPredicate = HasMinimum3Maximum3PKF16, FPDPRounding = 1 in {
let isCommutable = 1, FPDPRounding = 1 in {
let SubtargetPredicate = HasMin3Max3PKF16 in {
defm V_PK_MIN3_NUM_F16 : VOP3PInst<"v_pk_min3_num_f16", VOP3P_Profile<VOP_V2F16_V2F16_V2F16_V2F16>, AMDGPUfmin3>;
defm V_PK_MAX3_NUM_F16 : VOP3PInst<"v_pk_max3_num_f16", VOP3P_Profile<VOP_V2F16_V2F16_V2F16_V2F16>, AMDGPUfmax3>;
}

let SubtargetPredicate = HasMinimum3Maximum3PKF16 in {
defm V_PK_MINIMUM3_F16 : VOP3PInst<"v_pk_minimum3_f16", VOP3P_Profile<VOP_V2F16_V2F16_V2F16_V2F16>, AMDGPUfminimum3>;
defm V_PK_MAXIMUM3_F16 : VOP3PInst<"v_pk_maximum3_f16", VOP3P_Profile<VOP_V2F16_V2F16_V2F16_V2F16>, AMDGPUfmaximum3>;
}
} // End isCommutable = 1, FPDPRounding = 1

// TODO: Make sure we're doing the right thing with denormals. Note
// that FMA and MAD will differ.
Expand Down Expand Up @@ -2237,6 +2244,8 @@ defm V_PK_MIN_NUM_BF16 : VOP3P_Real_gfx1250<0x2b>;
defm V_PK_MAX_NUM_BF16 : VOP3P_Real_gfx1250<0x2c>;
defm V_PK_MINIMUM3_F16 : VOP3P_Real_gfx1250<0x36>;
defm V_PK_MAXIMUM3_F16 : VOP3P_Real_gfx1250<0x37>;
defm V_PK_MIN3_NUM_F16 : VOP3P_Real_gfx1250<0x38>;
defm V_PK_MAX3_NUM_F16 : VOP3P_Real_gfx1250<0x39>;

defm V_PK_MINIMUM_F16 : VOP3P_Real_gfx12<0x1d>;
defm V_PK_MAXIMUM_F16 : VOP3P_Real_gfx12<0x1e>;
Expand Down
191 changes: 191 additions & 0 deletions llvm/test/CodeGen/AMDGPU/fmax3.ll
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12-TRUE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12-FAKE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250,GFX1250-TRUE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250,GFX1250-FAKE16 %s

define amdgpu_kernel void @test_fmax3_olt_0_f32(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr, ptr addrspace(1) %cptr) #0 {
; SI-LABEL: test_fmax3_olt_0_f32:
Expand Down Expand Up @@ -157,6 +159,36 @@ define amdgpu_kernel void @test_fmax3_olt_0_f32(ptr addrspace(1) %out, ptr addrs
; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, v2
; GFX12-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-NEXT: s_endpgm
;
; GFX1250-LABEL: test_fmax3_olt_0_f32:
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_load_b256 s[0:7], s[4:5], 0x24
; GFX1250-NEXT: s_mov_b32 s10, -1
; GFX1250-NEXT: s_mov_b32 s11, 0x31016000
; GFX1250-NEXT: s_mov_b32 s14, s10
; GFX1250-NEXT: s_mov_b32 s15, s11
; GFX1250-NEXT: s_mov_b32 s18, s10
; GFX1250-NEXT: s_mov_b32 s19, s11
; GFX1250-NEXT: s_mov_b32 s22, s10
; GFX1250-NEXT: s_mov_b32 s23, s11
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: s_mov_b32 s12, s2
; GFX1250-NEXT: s_mov_b32 s13, s3
; GFX1250-NEXT: s_mov_b32 s16, s4
; GFX1250-NEXT: s_mov_b32 s17, s5
; GFX1250-NEXT: s_mov_b32 s20, s6
; GFX1250-NEXT: s_mov_b32 s21, s7
; GFX1250-NEXT: buffer_load_b32 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: buffer_load_b32 v1, off, s[16:19], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: buffer_load_b32 v2, off, s[20:23], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: s_mov_b32 s8, s0
; GFX1250-NEXT: s_mov_b32 s9, s1
; GFX1250-NEXT: v_max3_num_f32 v0, v0, v1, v2
; GFX1250-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX1250-NEXT: s_endpgm
%a = load volatile float, ptr addrspace(1) %aptr, align 4
%b = load volatile float, ptr addrspace(1) %bptr, align 4
%c = load volatile float, ptr addrspace(1) %cptr, align 4
Expand Down Expand Up @@ -317,6 +349,36 @@ define amdgpu_kernel void @test_fmax3_olt_1_f32(ptr addrspace(1) %out, ptr addrs
; GFX12-NEXT: v_max3_num_f32 v0, v2, v0, v1
; GFX12-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-NEXT: s_endpgm
;
; GFX1250-LABEL: test_fmax3_olt_1_f32:
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_load_b256 s[0:7], s[4:5], 0x24
; GFX1250-NEXT: s_mov_b32 s10, -1
; GFX1250-NEXT: s_mov_b32 s11, 0x31016000
; GFX1250-NEXT: s_mov_b32 s14, s10
; GFX1250-NEXT: s_mov_b32 s15, s11
; GFX1250-NEXT: s_mov_b32 s18, s10
; GFX1250-NEXT: s_mov_b32 s19, s11
; GFX1250-NEXT: s_mov_b32 s22, s10
; GFX1250-NEXT: s_mov_b32 s23, s11
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: s_mov_b32 s12, s2
; GFX1250-NEXT: s_mov_b32 s13, s3
; GFX1250-NEXT: s_mov_b32 s16, s4
; GFX1250-NEXT: s_mov_b32 s17, s5
; GFX1250-NEXT: s_mov_b32 s20, s6
; GFX1250-NEXT: s_mov_b32 s21, s7
; GFX1250-NEXT: buffer_load_b32 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: buffer_load_b32 v1, off, s[16:19], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: buffer_load_b32 v2, off, s[20:23], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: s_mov_b32 s8, s0
; GFX1250-NEXT: s_mov_b32 s9, s1
; GFX1250-NEXT: v_max3_num_f32 v0, v2, v0, v1
; GFX1250-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX1250-NEXT: s_endpgm
%a = load volatile float, ptr addrspace(1) %aptr, align 4
%b = load volatile float, ptr addrspace(1) %bptr, align 4
%c = load volatile float, ptr addrspace(1) %cptr, align 4
Expand Down Expand Up @@ -544,6 +606,66 @@ define amdgpu_kernel void @test_fmax3_olt_0_f16(ptr addrspace(1) %out, ptr addrs
; GFX12-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v2
; GFX12-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
;
; GFX1250-TRUE16-LABEL: test_fmax3_olt_0_f16:
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24
; GFX1250-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1250-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX1250-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX1250-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX1250-TRUE16-NEXT: s_mov_b32 s18, s10
; GFX1250-TRUE16-NEXT: s_mov_b32 s19, s11
; GFX1250-TRUE16-NEXT: s_mov_b32 s22, s10
; GFX1250-TRUE16-NEXT: s_mov_b32 s23, s11
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1250-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX1250-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX1250-TRUE16-NEXT: s_mov_b32 s16, s4
; GFX1250-TRUE16-NEXT: s_mov_b32 s17, s5
; GFX1250-TRUE16-NEXT: s_mov_b32 s20, s6
; GFX1250-TRUE16-NEXT: s_mov_b32 s21, s7
; GFX1250-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT: buffer_load_u16 v1, off, s[16:19], null scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT: buffer_load_u16 v2, off, s[20:23], null scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX1250-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX1250-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v2.l
; GFX1250-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
; GFX1250-TRUE16-NEXT: s_endpgm
;
; GFX1250-FAKE16-LABEL: test_fmax3_olt_0_f16:
; GFX1250-FAKE16: ; %bb.0:
; GFX1250-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24
; GFX1250-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX1250-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX1250-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX1250-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX1250-FAKE16-NEXT: s_mov_b32 s18, s10
; GFX1250-FAKE16-NEXT: s_mov_b32 s19, s11
; GFX1250-FAKE16-NEXT: s_mov_b32 s22, s10
; GFX1250-FAKE16-NEXT: s_mov_b32 s23, s11
; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX1250-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX1250-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX1250-FAKE16-NEXT: s_mov_b32 s16, s4
; GFX1250-FAKE16-NEXT: s_mov_b32 s17, s5
; GFX1250-FAKE16-NEXT: s_mov_b32 s20, s6
; GFX1250-FAKE16-NEXT: s_mov_b32 s21, s7
; GFX1250-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT: buffer_load_u16 v1, off, s[16:19], null scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT: buffer_load_u16 v2, off, s[20:23], null scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX1250-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX1250-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v2
; GFX1250-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
; GFX1250-FAKE16-NEXT: s_endpgm
%a = load volatile half, ptr addrspace(1) %aptr, align 2
%b = load volatile half, ptr addrspace(1) %bptr, align 2
%c = load volatile half, ptr addrspace(1) %cptr, align 2
Expand Down Expand Up @@ -772,6 +894,66 @@ define amdgpu_kernel void @test_fmax3_olt_1_f16(ptr addrspace(1) %out, ptr addrs
; GFX12-FAKE16-NEXT: v_max3_num_f16 v0, v2, v0, v1
; GFX12-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
;
; GFX1250-TRUE16-LABEL: test_fmax3_olt_1_f16:
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24
; GFX1250-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1250-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX1250-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX1250-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX1250-TRUE16-NEXT: s_mov_b32 s18, s10
; GFX1250-TRUE16-NEXT: s_mov_b32 s19, s11
; GFX1250-TRUE16-NEXT: s_mov_b32 s22, s10
; GFX1250-TRUE16-NEXT: s_mov_b32 s23, s11
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1250-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX1250-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX1250-TRUE16-NEXT: s_mov_b32 s16, s4
; GFX1250-TRUE16-NEXT: s_mov_b32 s17, s5
; GFX1250-TRUE16-NEXT: s_mov_b32 s20, s6
; GFX1250-TRUE16-NEXT: s_mov_b32 s21, s7
; GFX1250-TRUE16-NEXT: buffer_load_u16 v1, off, s[12:15], null scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT: buffer_load_u16 v2, off, s[16:19], null scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT: buffer_load_u16 v0, off, s[20:23], null scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX1250-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX1250-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v2.l
; GFX1250-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
; GFX1250-TRUE16-NEXT: s_endpgm
;
; GFX1250-FAKE16-LABEL: test_fmax3_olt_1_f16:
; GFX1250-FAKE16: ; %bb.0:
; GFX1250-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24
; GFX1250-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX1250-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX1250-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX1250-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX1250-FAKE16-NEXT: s_mov_b32 s18, s10
; GFX1250-FAKE16-NEXT: s_mov_b32 s19, s11
; GFX1250-FAKE16-NEXT: s_mov_b32 s22, s10
; GFX1250-FAKE16-NEXT: s_mov_b32 s23, s11
; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX1250-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX1250-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX1250-FAKE16-NEXT: s_mov_b32 s16, s4
; GFX1250-FAKE16-NEXT: s_mov_b32 s17, s5
; GFX1250-FAKE16-NEXT: s_mov_b32 s20, s6
; GFX1250-FAKE16-NEXT: s_mov_b32 s21, s7
; GFX1250-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT: buffer_load_u16 v1, off, s[16:19], null scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT: buffer_load_u16 v2, off, s[20:23], null scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX1250-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX1250-FAKE16-NEXT: v_max3_num_f16 v0, v2, v0, v1
; GFX1250-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
; GFX1250-FAKE16-NEXT: s_endpgm
%a = load volatile half, ptr addrspace(1) %aptr, align 2
%b = load volatile half, ptr addrspace(1) %bptr, align 2
%c = load volatile half, ptr addrspace(1) %cptr, align 2
Expand Down Expand Up @@ -850,6 +1032,15 @@ define <2 x half> @no_fmax3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c, <
; GFX12-NEXT: v_pk_max_num_f16 v0, v2, v0
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-LABEL: no_fmax3_v2f16:
; GFX1250: ; %bb.0: ; %entry
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-NEXT: v_pk_max3_num_f16 v0, v2, v0, v3
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
entry:
%max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %b)
%max1 = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %c, <2 x half> %max)
Expand Down
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