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[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. #150689

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Merged
merged 4 commits into from
Jul 26, 2025
Merged

[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. #150689

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fb7c6b7
[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints.
topperc Jul 25, 2025
3cbbff3
Merge the HINT instructions into the non-HINT instructions.
topperc Jul 26, 2025
1ce96bd
Fix test comment
topperc Jul 26, 2025
932d03f
Fix test comment
topperc Jul 26, 2025
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32 changes: 32 additions & 0 deletions llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -540,6 +540,14 @@ static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus decodeRVCInstrShiftLeftHint(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus decodeRVCInstrShiftRightHint(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus decodeRVCInstrRdSImm6(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);
Expand Down Expand Up @@ -591,6 +599,30 @@ static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn,
return S;
}

static DecodeStatus decodeRVCInstrShiftLeftHint(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
DecodeStatus S = MCDisassembler::Success;
uint32_t Rd = fieldFromInstruction(Insn, 7, 5);
if (!Check(S, DecodeGPRRegisterClass(Inst, Rd, Address, Decoder)))
return MCDisassembler::Fail;
Inst.addOperand(Inst.getOperand(0));
Inst.addOperand(MCOperand::createImm(0));
return S;
}

static DecodeStatus
decodeRVCInstrShiftRightHint(MCInst &Inst, uint32_t Insn, uint64_t Address,
const MCDisassembler *Decoder) {
DecodeStatus S = MCDisassembler::Success;
uint32_t Rd = fieldFromInstruction(Insn, 7, 3);
if (!Check(S, DecodeGPRCRegisterClass(Inst, Rd, Address, Decoder)))
return MCDisassembler::Fail;
Inst.addOperand(Inst.getOperand(0));
Inst.addOperand(MCOperand::createImm(0));
return S;
}
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@lenary lenary Jul 25, 2025

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I hope at some point we can get rid of a lot of these custom full-instruction decoders, maybe by making per-operand decoders for specific operands? This doesn't need to be done in this change.


static DecodeStatus decodeCSSPushPopchk(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
Expand Down
21 changes: 15 additions & 6 deletions llvm/lib/Target/RISCV/RISCVInstrInfoC.td
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Original file line number Diff line number Diff line change
Expand Up @@ -664,31 +664,35 @@ def C_SLLI_HINT : RVInst16CI<0b000, 0b10, (outs GPRX0:$rd_wb),
let DecoderMethod = "decodeRVCInstrRdRs1UImmLog2XLenNonZero";
}

def C_SLLI64_HINT : RVInst16CI<0b000, 0b10, (outs GPR:$rd_wb), (ins GPR:$rd),
"c.slli64", "$rd">,
def C_SLLI64_HINT : RVInst16CI<0b000, 0b10, (outs GPR:$rd_wb),
(ins GPR:$rd, immzero:$imm),
"c.slli", "$rd, $imm">,
Sched<[WriteShiftImm, ReadShiftImm]> {
let Constraints = "$rd = $rd_wb";
let imm = 0;
let DecoderMethod = "decodeRVCInstrShiftLeftHint";
}

def C_SRLI64_HINT : RVInst16CB<0b100, 0b01, (outs GPRC:$rd),
(ins GPRC:$rs1),
"c.srli64", "$rs1">,
(ins GPRC:$rs1, immzero:$imm),
"c.srli", "$rs1, $imm">,
Sched<[WriteShiftImm, ReadShiftImm]> {
let Constraints = "$rs1 = $rd";
let Inst{6-2} = 0;
let Inst{11-10} = 0b00;
let Inst{12} = 0;
let DecoderMethod = "decodeRVCInstrShiftRightHint";
}

def C_SRAI64_HINT : RVInst16CB<0b100, 0b01, (outs GPRC:$rd),
(ins GPRC:$rs1),
"c.srai64", "$rs1">,
(ins GPRC:$rs1, immzero:$imm),
"c.srai", "$rs1, $imm">,
Sched<[WriteShiftImm, ReadShiftImm]> {
let Constraints = "$rs1 = $rd";
let Inst{6-2} = 0;
let Inst{11-10} = 0b01;
let Inst{12} = 0;
let DecoderMethod = "decodeRVCInstrShiftRightHint";
}

} // Predicates = [HasStdExtZca], hasSideEffects = 0, mayLoad = 0,
Expand All @@ -701,6 +705,11 @@ def C_SRAI64_HINT : RVInst16CB<0b100, 0b01, (outs GPRC:$rd),
let Predicates = [HasStdExtZca] in {
// Just a different syntax for the c.nop hint: c.addi x0, simm6 vs c.nop simm6.
def : InstAlias<"c.addi x0, $imm", (C_NOP_HINT simm6nonzero:$imm), 0>;

// Legacy aliases.
def : InstAlias<"c.slli64 $rd", (C_SLLI64_HINT GPR:$rd, 0), 0>;
def : InstAlias<"c.srli64 $rs1", (C_SRLI64_HINT GPRC:$rs1, 0), 0>;
def : InstAlias<"c.srai64 $rs1", (C_SRAI64_HINT GPRC:$rs1, 0), 0>;
}

let Predicates = [HasStdExtC, HasStdExtZihintntl] in {
Expand Down
64 changes: 32 additions & 32 deletions llvm/test/MC/Disassembler/RISCV/c_slli.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@
# RUN: -M no-aliases --show-encoding < %s 2>&1 | \
# RUN: FileCheck --check-prefix=NOHINTS %s

# GOOD: c.slli64 zero
# GOOD: c.slli zero, 0
# NOHINTS: invalid instruction encoding
0x02 0x00

Expand Down Expand Up @@ -302,7 +302,7 @@
# NOHINTS: invalid instruction encoding
0x7E 0x10

# GOOD: c.slli64 ra
# GOOD: c.slli ra, 0
0x82 0x00

# GOOD: c.slli ra, 1
Expand Down Expand Up @@ -526,7 +526,7 @@
# GOOD64: c.slli ra, 63
0xFE 0x10

# GOOD: c.slli64 sp
# GOOD: c.slli sp, 0
0x02 0x01

# GOOD: c.slli sp, 1
Expand Down Expand Up @@ -750,7 +750,7 @@
# GOOD64: c.slli sp, 63
0x7E 0x11

# GOOD: c.slli64 gp
# GOOD: c.slli gp, 0
0x82 0x01

# GOOD: c.slli gp, 1
Expand Down Expand Up @@ -974,7 +974,7 @@
# GOOD64: c.slli gp, 63
0xFE 0x11

# GOOD: c.slli64 tp
# GOOD: c.slli tp, 0
0x02 0x02

# GOOD: c.slli tp, 1
Expand Down Expand Up @@ -1198,7 +1198,7 @@
# GOOD64: c.slli tp, 63
0x7E 0x12

# GOOD: c.slli64 t0
# GOOD: c.slli t0, 0
0x82 0x02

# GOOD: c.slli t0, 1
Expand Down Expand Up @@ -1422,7 +1422,7 @@
# GOOD64: c.slli t0, 63
0xFE 0x12

# GOOD: c.slli64 t1
# GOOD: c.slli t1, 0
0x02 0x03

# GOOD: c.slli t1, 1
Expand Down Expand Up @@ -1646,7 +1646,7 @@
# GOOD64: c.slli t1, 63
0x7E 0x13

# GOOD: c.slli64 t2
# GOOD: c.slli t2, 0
0x82 0x03

# GOOD: c.slli t2, 1
Expand Down Expand Up @@ -1870,7 +1870,7 @@
# GOOD64: c.slli t2, 63
0xFE 0x13

# GOOD: c.slli64 s0
# GOOD: c.slli s0, 0
0x02 0x04

# GOOD: c.slli s0, 1
Expand Down Expand Up @@ -2094,7 +2094,7 @@
# GOOD64: c.slli s0, 63
0x7E 0x14

# GOOD: c.slli64 s1
# GOOD: c.slli s1, 0
0x82 0x04

# GOOD: c.slli s1, 1
Expand Down Expand Up @@ -2318,7 +2318,7 @@
# GOOD64: c.slli s1, 63
0xFE 0x14

# GOOD: c.slli64 a0
# GOOD: c.slli a0, 0
0x02 0x05

# GOOD: c.slli a0, 1
Expand Down Expand Up @@ -2542,7 +2542,7 @@
# GOOD64: c.slli a0, 63
0x7E 0x15

# GOOD: c.slli64 a1
# GOOD: c.slli a1, 0
0x82 0x05

# GOOD: c.slli a1, 1
Expand Down Expand Up @@ -2766,7 +2766,7 @@
# GOOD64: c.slli a1, 63
0xFE 0x15

# GOOD: c.slli64 a2
# GOOD: c.slli a2, 0
0x02 0x06

# GOOD: c.slli a2, 1
Expand Down Expand Up @@ -2990,7 +2990,7 @@
# GOOD64: c.slli a2, 63
0x7E 0x16

# GOOD: c.slli64 a3
# GOOD: c.slli a3, 0
0x82 0x06

# GOOD: c.slli a3, 1
Expand Down Expand Up @@ -3214,7 +3214,7 @@
# GOOD64: c.slli a3, 63
0xFE 0x16

# GOOD: c.slli64 a4
# GOOD: c.slli a4, 0
0x02 0x07

# GOOD: c.slli a4, 1
Expand Down Expand Up @@ -3438,7 +3438,7 @@
# GOOD64: c.slli a4, 63
0x7E 0x17

# GOOD: c.slli64 a5
# GOOD: c.slli a5, 0
0x82 0x07

# GOOD: c.slli a5, 1
Expand Down Expand Up @@ -3662,7 +3662,7 @@
# GOOD64: c.slli a5, 63
0xFE 0x17

# GOOD: c.slli64 a6
# GOOD: c.slli a6, 0
0x02 0x08

# GOOD: c.slli a6, 1
Expand Down Expand Up @@ -3886,7 +3886,7 @@
# GOOD64: c.slli a6, 63
0x7E 0x18

# GOOD: c.slli64 a7
# GOOD: c.slli a7, 0
0x82 0x08

# GOOD: c.slli a7, 1
Expand Down Expand Up @@ -4110,7 +4110,7 @@
# GOOD64: c.slli a7, 63
0xFE 0x18

# GOOD: c.slli64 s2
# GOOD: c.slli s2, 0
0x02 0x09

# GOOD: c.slli s2, 1
Expand Down Expand Up @@ -4334,7 +4334,7 @@
# GOOD64: c.slli s2, 63
0x7E 0x19

# GOOD: c.slli64 s3
# GOOD: c.slli s3, 0
0x82 0x09

# GOOD: c.slli s3, 1
Expand Down Expand Up @@ -4558,7 +4558,7 @@
# GOOD64: c.slli s3, 63
0xFE 0x19

# GOOD: c.slli64 s4
# GOOD: c.slli s4, 0
0x02 0x0A

# GOOD: c.slli s4, 1
Expand Down Expand Up @@ -4782,7 +4782,7 @@
# GOOD64: c.slli s4, 63
0x7E 0x1A

# GOOD: c.slli64 s5
# GOOD: c.slli s5, 0
0x82 0x0A

# GOOD: c.slli s5, 1
Expand Down Expand Up @@ -5006,7 +5006,7 @@
# GOOD64: c.slli s5, 63
0xFE 0x1A

# GOOD: c.slli64 s6
# GOOD: c.slli s6, 0
0x02 0x0B

# GOOD: c.slli s6, 1
Expand Down Expand Up @@ -5230,7 +5230,7 @@
# GOOD64: c.slli s6, 63
0x7E 0x1B

# GOOD: c.slli64 s7
# GOOD: c.slli s7, 0
0x82 0x0B

# GOOD: c.slli s7, 1
Expand Down Expand Up @@ -5454,7 +5454,7 @@
# GOOD64: c.slli s7, 63
0xFE 0x1B

# GOOD: c.slli64 s8
# GOOD: c.slli s8, 0
0x02 0x0C

# GOOD: c.slli s8, 1
Expand Down Expand Up @@ -5678,7 +5678,7 @@
# GOOD64: c.slli s8, 63
0x7E 0x1C

# GOOD: c.slli64 s9
# GOOD: c.slli s9, 0
0x82 0x0C

# GOOD: c.slli s9, 1
Expand Down Expand Up @@ -5902,7 +5902,7 @@
# GOOD64: c.slli s9, 63
0xFE 0x1C

# GOOD: c.slli64 s10
# GOOD: c.slli s10, 0
0x02 0x0D

# GOOD: c.slli s10, 1
Expand Down Expand Up @@ -6126,7 +6126,7 @@
# GOOD64: c.slli s10, 63
0x7E 0x1D

# GOOD: c.slli64 s11
# GOOD: c.slli s11, 0
0x82 0x0D

# GOOD: c.slli s11, 1
Expand Down Expand Up @@ -6350,7 +6350,7 @@
# GOOD64: c.slli s11, 63
0xFE 0x1D

# GOOD: c.slli64 t3
# GOOD: c.slli t3, 0
0x02 0x0E

# GOOD: c.slli t3, 1
Expand Down Expand Up @@ -6574,7 +6574,7 @@
# GOOD64: c.slli t3, 63
0x7E 0x1E

# GOOD: c.slli64 t4
# GOOD: c.slli t4, 0
0x82 0x0E

# GOOD: c.slli t4, 1
Expand Down Expand Up @@ -6798,7 +6798,7 @@
# GOOD64: c.slli t4, 63
0xFE 0x1E

# GOOD: c.slli64 t5
# GOOD: c.slli t5, 0
0x02 0x0F

# GOOD: c.slli t5, 1
Expand Down Expand Up @@ -7022,7 +7022,7 @@
# GOOD64: c.slli t5, 63
0x7E 0x1F

# GOOD: c.slli64 t6
# GOOD: c.slli t6, 0
0x82 0x0F

# GOOD: c.slli t6, 1
Expand Down
3 changes: 1 addition & 2 deletions llvm/test/MC/RISCV/rv32c-invalid.s
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Expand Up @@ -36,9 +36,8 @@ c.addi16sp t0, 16 # CHECK: :[[@LINE]]:13: error: register must be sp (x2)
# Out of range immediates

## uimmlog2xlennonzero
c.slli t0, 64 # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 31]
c.slli t0, 64 # CHECK: :[[@LINE]]:12: error: immediate must be zero
c.srli a0, 32 # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 31]
c.srai a0, 0 # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 31]

## simm6
c.li t0, 128 # CHECK: :[[@LINE]]:10: error: immediate must be an integer in the range [-32, 31]
Expand Down
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