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[SECV] Try to push the op into ZExt: A + zext (-A + B) -> zext (B) #151227

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Merged
merged 2 commits into from
Jul 30, 2025
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[SECV] Try to push the op into ZExt: A + zext (-A + B) -> zext (B) #151227

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[SECV] Try to push the op into ZExt: A + zext (-A + B) -> zext (B)
fhahn Jul 29, 2025
e834442
!fixup pass FlagAnyWrap.
fhahn Jul 30, 2025
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15 changes: 15 additions & 0 deletions llvm/lib/Analysis/ScalarEvolution.cpp
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Expand Up @@ -2682,6 +2682,21 @@ const SCEV *ScalarEvolution::getAddExpr(SmallVectorImpl<const SCEV *> &Ops,
return getAddExpr(NewOps, PreservedFlags);
}
}

// Try to push the constant operand into a ZExt: A + zext (-A + B) -> zext
// (B), if trunc (A) + -A + B does not unsigned-wrap.
if (auto *ZExt = dyn_cast<SCEVZeroExtendExpr>(Ops[1])) {
const SCEV *B = ZExt->getOperand(0);
const SCEV *NarrowA = getTruncateExpr(A, B->getType());
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@nikic nikic Jul 31, 2025

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Check isa<SCEVAddExpr>(B) before computing getTruncateExpr?

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@fhahn fhahn Jul 31, 2025

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Thanks, should be done in ab9b23c by introducing a new m_scec_Add() which matches and captures SCEVAddExpr with an abitrary number of operands

if (isa<SCEVAddExpr>(B) &&
NarrowA == getNegativeSCEV(cast<SCEVAddExpr>(B)->getOperand(0)) &&
getZeroExtendExpr(NarrowA, ZExt->getType()) == A &&
hasFlags(StrengthenNoWrapFlags(this, scAddExpr, {NarrowA, B},
SCEV::FlagAnyWrap),
SCEV::FlagNUW)) {
return getZeroExtendExpr(getAddExpr(NarrowA, B), ZExt->getType());
}
}
}

// Canonicalize (-1 * urem X, Y) + X --> (Y * X/Y)
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2 changes: 1 addition & 1 deletion llvm/test/Analysis/ScalarEvolution/zext-add.ll
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Expand Up @@ -17,7 +17,7 @@ define void @test_push_constant_into_zext(ptr %dst, ptr %src, i32 %n, i64 %offse
; CHECK-NEXT: %l = load i8, ptr %outer.ptr, align 1
; CHECK-NEXT: --> %l U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner.loop: Variant, %outer.loop: Variant }
; CHECK-NEXT: %ptr.iv.next = getelementptr i8, ptr %ptr.iv, i64 %offset
; CHECK-NEXT: --> {(%offset + %src),+,%offset}<%inner.loop> U: full-set S: full-set Exits: (((1 + (zext i32 (-1 + (1 smax %n))<nsw> to i64))<nuw><nsw> * %offset) + %src) LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
; CHECK-NEXT: --> {(%offset + %src),+,%offset}<%inner.loop> U: full-set S: full-set Exits: (((zext i32 (1 smax %n) to i64) * %offset) + %src) LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
; CHECK-NEXT: %iv.next = add i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%inner.loop> U: [1,-2147483648) S: [1,-2147483648) Exits: (1 smax %n) LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @test_push_constant_into_zext
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10 changes: 5 additions & 5 deletions llvm/test/Transforms/IndVarSimplify/AArch64/fold-ext-add.ll
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Expand Up @@ -10,21 +10,21 @@ define void @pred_mip_12(ptr %dst, ptr %src, i32 %n, i64 %offset) {
; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i32 [[N:%.*]], i64 [[OFFSET:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N]], i32 1)
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[SMAX]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[OFFSET]], [[TMP0]]
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP1]]
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@efriedma-quic efriedma-quic Jul 29, 2025

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In addition to the indvars tests, can you add a scalar-evolution analysis test that shows the flags in a dump?

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@fhahn fhahn Jul 30, 2025

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Yup, added an analysis only test, thanks!

; CHECK-NEXT: br label %[[OUTER_LOOP:.*]]
; CHECK: [[OUTER_LOOP_LOOPEXIT:.*]]:
; CHECK-NEXT: [[PTR_IV_NEXT_LCSSA:%.*]] = phi ptr [ [[PTR_IV_NEXT:%.*]], %[[INNER_LOOP:.*]] ]
; CHECK-NEXT: br label %[[OUTER_LOOP]]
; CHECK: [[OUTER_LOOP]]:
; CHECK-NEXT: [[OUTER_PTR:%.*]] = phi ptr [ [[SRC]], %[[ENTRY]] ], [ [[PTR_IV_NEXT_LCSSA]], %[[OUTER_LOOP_LOOPEXIT]] ]
; CHECK-NEXT: [[OUTER_PTR:%.*]] = phi ptr [ [[SRC]], %[[ENTRY]] ], [ [[SCEVGEP]], %[[OUTER_LOOP_LOOPEXIT]] ]
; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C]], label %[[INNER_LOOP_PREHEADER:.*]], label %[[EXIT:.*]]
; CHECK: [[INNER_LOOP_PREHEADER]]:
; CHECK-NEXT: br label %[[INNER_LOOP]]
; CHECK-NEXT: br label %[[INNER_LOOP:.*]]
; CHECK: [[INNER_LOOP]]:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], %[[INNER_LOOP]] ], [ 0, %[[INNER_LOOP_PREHEADER]] ]
; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[PTR_IV_NEXT]], %[[INNER_LOOP]] ], [ [[SRC]], %[[INNER_LOOP_PREHEADER]] ]
; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[OUTER_PTR]], align 1
; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr i8, ptr [[PTR_IV]], i64 [[OFFSET]]
; CHECK-NEXT: store i8 [[L]], ptr [[DST]], align 2
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], [[SMAX]]
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6 changes: 2 additions & 4 deletions llvm/test/Transforms/IndVarSimplify/zext-nuw.ll
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Expand Up @@ -15,11 +15,9 @@ define void @_Z3fn1v() {
; CHECK-NEXT: [[J_SROA_0_0_COPYLOAD:%.*]] = load i8, ptr [[X5]], align 1
; CHECK-NEXT: br label [[DOTPREHEADER4_LR_PH:%.*]]
; CHECK: .preheader4.lr.ph:
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[X4]], -1
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[TMP1]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
; CHECK-NEXT: [[TMP4:%.*]] = sext i8 [[J_SROA_0_0_COPYLOAD]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP3]], [[TMP4]]
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[X4]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], [[TMP2]]
; CHECK-NEXT: br label [[DOTPREHEADER4:%.*]]
; CHECK: .preheader4:
; CHECK-NEXT: [[K_09:%.*]] = phi ptr [ undef, [[DOTPREHEADER4_LR_PH]] ], [ [[X25:%.*]], [[X22:%.*]] ]
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