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[RegAlloc] Fix use-after-free in RegAllocBase::cleanupFailedVReg #151435

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Merged
merged 3 commits into from
Aug 1, 2025
Merged

[RegAlloc] Fix use-after-free in RegAllocBase::cleanupFailedVReg #151435

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4f1c8bc
[RegAlloc] Fix use-after-free in `RegAllocBase::cleanupFailedVReg`
shiltian Jul 31, 2025
8a254cd
fix comments
shiltian Jul 31, 2025
0712ae9
make sure verifier doesn't fire
shiltian Jul 31, 2025
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4 changes: 1 addition & 3 deletions llvm/lib/CodeGen/RegAllocBase.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -178,10 +178,8 @@ void RegAllocBase::cleanupFailedVReg(Register FailedReg, MCRegister PhysReg,
for (MCRegAliasIterator Aliases(PhysReg, TRI, true); Aliases.isValid();
++Aliases) {
for (MachineOperand &MO : MRI->reg_operands(*Aliases)) {
if (MO.readsReg()) {
if (MO.readsReg())
MO.setIsUndef(true);
LIS->removeAllRegUnitsForPhysReg(MO.getReg());
}
}
}
}
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16 changes: 16 additions & 0 deletions llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
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@@ -0,0 +1,16 @@
; RUN: not llc -mcpu=gfx1100 -mtriple=amdgcn-amd-amdhsa -stress-regalloc=4 -filetype=null -verify-machineinstrs %s 2>&1 | FileCheck %s

; CHECK: error: <unknown>:0:0: ran out of registers during register allocation in function 'f'
; CHECK-NOT: Bad machine code

define <16 x half> @f(i1 %LGV2, <16 x half> %0) {
BB:
br i1 %LGV2, label %SW_C3, label %SW_C

SW_C: ; preds = %BB
%B1 = fmul <16 x half> %0, zeroinitializer
ret <16 x half> %B1

SW_C3: ; preds = %BB
ret <16 x half> <half 0xH0000, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison, half poison>
}