[MLIR][Python] MLIR Enum Python bindings infinite recursion (#151584) #151588
Conversation
|
Thank you for submitting a Pull Request (PR) to the LLVM Project! This PR will be automatically labeled and the relevant teams will be notified. If you wish to, you can add reviewers by using the "Reviewers" section on this page. If this is not working for you, it is probably because you do not have write permissions for the repository. In which case you can instead tag reviewers by name in a comment by using If you have received no comments on your PR for a week, you can request a review by "ping"ing the PR by adding a comment “Ping”. The common courtesy "ping" rate is once a week. Please remember that you are asking for valuable time from other developers. If you have further questions, they may be answered by the LLVM GitHub User Guide. You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums. |
|
@llvm/pr-subscribers-mlir-core @llvm/pr-subscribers-mlir Author: Nick Smith (nsmithtt) ChangesFull diff: https://github.com/llvm/llvm-project/pull/151588.diff 2 Files Affected:
diff --git a/mlir/test/mlir-tblgen/enums-python-bindings.td b/mlir/test/mlir-tblgen/enums-python-bindings.td
index 1c5567f54a5f4..cd23b6a2effb9 100644
--- a/mlir/test/mlir-tblgen/enums-python-bindings.td
+++ b/mlir/test/mlir-tblgen/enums-python-bindings.td
@@ -62,12 +62,15 @@ def MyEnum64 : I64EnumAttr<"MyEnum64", "An example 64-bit enum", [One64, Two64]>
// CHECK: def _myenum64(x, context):
// CHECK: return _ods_ir.IntegerAttr.get(_ods_ir.IntegerType.get_signless(64, context=context), int(x))
+def User : I32BitEnumAttrCaseBit<"User", 0, "user">;
+def Group : I32BitEnumAttrCaseBit<"Group", 1, "group">;
+def Other : I32BitEnumAttrCaseBit<"Other", 2, "other">;
+
def TestBitEnum
- : I32BitEnumAttr<"TestBitEnum", "", [
- I32BitEnumAttrCaseBit<"User", 0, "user">,
- I32BitEnumAttrCaseBit<"Group", 1, "group">,
- I32BitEnumAttrCaseBit<"Other", 2, "other">,
- ]> {
+ : I32BitEnumAttr<
+ "TestBitEnum", "",
+ [User, Group, Other,
+ I32BitEnumAttrCaseGroup<"Any", [User, Group, Other], "any">]> {
let genSpecializedAttr = 0;
let separator = " | ";
}
@@ -79,9 +82,10 @@ def TestBitEnum_Attr : EnumAttr<Test_Dialect, TestBitEnum, "testbitenum">;
// CHECK: User = 1
// CHECK: Group = 2
// CHECK: Other = 4
+// CHECK: Any = 7
// CHECK: def __iter__(self):
-// CHECK: return iter([case for case in type(self) if (self & case) is case])
+// CHECK: return iter([case for case in type(self) if (self & case) is case and self is not case])
// CHECK: def __len__(self):
// CHECK: return bin(self).count("1")
@@ -94,6 +98,8 @@ def TestBitEnum_Attr : EnumAttr<Test_Dialect, TestBitEnum, "testbitenum">;
// CHECK: return "group"
// CHECK: if self is TestBitEnum.Other:
// CHECK: return "other"
+// CHECK: if self is TestBitEnum.Any:
+// CHECK: return "any"
// CHECK: raise ValueError("Unknown TestBitEnum enum entry.")
// CHECK: @register_attribute_builder("TestBitEnum")
diff --git a/mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp b/mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
index 8e2d6114e48eb..acc9b61d7121c 100644
--- a/mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
+++ b/mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
@@ -64,7 +64,7 @@ static void emitEnumClass(EnumInfo enumInfo, raw_ostream &os) {
if (enumInfo.isBitEnum()) {
os << formatv(" def __iter__(self):\n"
" return iter([case for case in type(self) if "
- "(self & case) is case])\n");
+ "(self & case) is case and self is not case])\n");
os << formatv(" def __len__(self):\n"
" return bin(self).count(\"1\")\n");
os << "\n";
|
| os << formatv(" def __iter__(self):\n" | ||
| " return iter([case for case in type(self) if " | ||
| "(self & case) is case])\n"); | ||
| "(self & case) is case and self is not case])\n"); |
There was a problem hiding this comment.
This is the key part, do not allow iteration over exactly self's bit value otherwise recursion ensues.
|
So it turns out this is "fixed" in 3.11 but I'm fine merging this in modulo people being fine with the fact that "groups" won't be printed i.e., class ChipCapability(IntFlag):
"""TT Chip Capabilities"""
PCIE = 1
HostMMIO = 2
All = 3
def __iter__(self):
return iter([case for case in type(self) if (self & case) is case])
def __len__(self):
return bin(self).count("1")
def __str__(self):
if len(self) > 1:
return "|".join(map(str, self))
if self is ChipCapability.PCIE:
return "pcie"
if self is ChipCapability.HostMMIO:
return "host_mmio"
if self is ChipCapability.All:
return "all"
raise ValueError("Unknown ChipCapability enum entry.")
x = ChipCapability.All
print(x)will print |
I don't see issues with that |
|
@nsmithtt Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR. Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues. How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
) (llvm#151588) Fixes an infinite recursion bug when using I32BitEnumAttrCaseGroup with python bindings. For more info, see issue: - llvm#151584
4 participants
Fixes an infinite recursion bug when using I32BitEnumAttrCaseGroup with python bindings.
For more info, see issue: