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[mlir] MemRefToSPIRV propagate alignment attributes from MemRef ops. #151723

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Merged
merged 6 commits into from
Aug 7, 2025
Merged

[mlir] MemRefToSPIRV propagate alignment attributes from MemRef ops. #151723

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f4664aa
[mlir] Use memref's alignment attribute directly.
amd-eochoalo Aug 1, 2025
1c3455c
[mlir] MemRefToSPIRV propagate alignment attribute.
amd-eochoalo Aug 1, 2025
526787f
[mlir] Fix calculateMemoryRequirements in MemRefToSPIRV.
amd-eochoalo Aug 1, 2025
04a811b
[mlir] Ensure memref's alignment is within SPIRV's alignment bounds.
amd-eochoalo Aug 1, 2025
0337e22
[mlir] Add aligned nontemporal load test to MemRefToSPIRV.
amd-eochoalo Aug 1, 2025
454e3fd
Address review comments
amd-eochoalo Aug 7, 2025
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13 changes: 5 additions & 8 deletions mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -475,7 +475,10 @@ calculateMemoryRequirements(Value accessedPtr, bool isNontemporal,
}

auto ptrType = cast<spirv::PointerType>(accessedPtr.getType());
if (ptrType.getStorageClass() != spirv::StorageClass::PhysicalStorageBuffer) {
bool mayOmitAlignment =
!preferredAlignment &&
ptrType.getStorageClass() != spirv::StorageClass::PhysicalStorageBuffer;
if (mayOmitAlignment) {
if (memoryAccess == spirv::MemoryAccess::None) {
return MemoryRequirements{spirv::MemoryAccessAttr{}, IntegerAttr{}};
}
Expand All @@ -484,6 +487,7 @@ calculateMemoryRequirements(Value accessedPtr, bool isNontemporal,
}

// PhysicalStorageBuffers require the `Aligned` attribute.
// Other storage types may show an `Aligned` attribute.
auto pointeeType = dyn_cast<spirv::ScalarType>(ptrType.getPointeeType());
if (!pointeeType)
return failure();
Expand All @@ -510,13 +514,6 @@ calculateMemoryRequirements(Value accessedPtr, LoadOrStoreOp loadOrStoreOp) {
llvm::is_one_of<LoadOrStoreOp, memref::LoadOp, memref::StoreOp>::value,
"Must be called on either memref::LoadOp or memref::StoreOp");

Operation *memrefAccessOp = loadOrStoreOp.getOperation();
auto memrefMemAccess = memrefAccessOp->getAttrOfType<spirv::MemoryAccessAttr>(
spirv::attributeName<spirv::MemoryAccess>());
auto memrefAlignment = loadOrStoreOp.getAlignmentAttr();
if (memrefMemAccess && memrefAlignment)
return MemoryRequirements{memrefMemAccess, memrefAlignment};

return calculateMemoryRequirements(accessedPtr,
loadOrStoreOp.getNontemporal(),
loadOrStoreOp.getAlignment().value_or(0));
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17 changes: 16 additions & 1 deletion mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -86,8 +86,23 @@ func.func @load_i1(%src: memref<4xi1, #spirv.storage_class<StorageBuffer>>, %i :
}

// CHECK-LABEL: func @load_aligned
// CHECK-SAME: (%[[SRC:.+]]: memref<4xi1, #spirv.storage_class<StorageBuffer>>, %[[IDX:.+]]: index)
func.func @load_aligned(%src: memref<4xi1, #spirv.storage_class<StorageBuffer>>, %i : index) -> i1 {
// CHECK-DAG: %[[SRC_CAST:.+]] = builtin.unrealized_conversion_cast %[[SRC]] : memref<4xi1, #spirv.storage_class<StorageBuffer>> to !spirv.ptr<!spirv.struct<(!spirv.array<4 x i8, stride=1> [0])>, StorageBuffer>
// CHECK-DAG: %[[IDX_CAST:.+]] = builtin.unrealized_conversion_cast %[[IDX]]
// CHECK: %[[ZERO:.*]] = spirv.Constant 0 : i32
// CHECK: %[[ADDR:.+]] = spirv.AccessChain %[[SRC_CAST]][%[[ZERO]], %[[IDX_CAST]]]
// CHECK: %[[VAL:.+]] = spirv.Load "StorageBuffer" %[[ADDR]] ["Aligned", 32] : i8
// CHECK: %[[ZERO_I8:.+]] = spirv.Constant 0 : i8
// CHECK: %[[BOOL:.+]] = spirv.INotEqual %[[VAL]], %[[ZERO_I8]] : i8
%0 = memref.load %src[%i] { alignment = 32 } : memref<4xi1, #spirv.storage_class<StorageBuffer>>
// CHECK: return %[[BOOL]]
return %0: i1
}

// CHECK-LABEL: func @load_aligned_psb
// CHECK-SAME: (%[[SRC:.+]]: memref<4xi1, #spirv.storage_class<PhysicalStorageBuffer>>, %[[IDX:.+]]: index)
func.func @load_aligned(%src: memref<4xi1, #spirv.storage_class<PhysicalStorageBuffer>>, %i : index) -> i1 {
func.func @load_aligned_psb(%src: memref<4xi1, #spirv.storage_class<PhysicalStorageBuffer>>, %i : index) -> i1 {
// CHECK-DAG: %[[SRC_CAST:.+]] = builtin.unrealized_conversion_cast %[[SRC]] : memref<4xi1, #spirv.storage_class<PhysicalStorageBuffer>> to !spirv.ptr<!spirv.struct<(!spirv.array<4 x i8, stride=1> [0])>, PhysicalStorageBuffer>
// CHECK-DAG: %[[IDX_CAST:.+]] = builtin.unrealized_conversion_cast %[[IDX]]
// CHECK: %[[ZERO:.*]] = spirv.Constant 0 : i32
Expand Down