Skip to content

Reland [VectorUtils] Trivially vectorize ldexp, [l]lround #152476

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Aug 7, 2025
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 6 additions & 0 deletions llvm/lib/Analysis/VectorUtils.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,7 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
case Intrinsic::exp:
case Intrinsic::exp10:
case Intrinsic::exp2:
case Intrinsic::ldexp:
case Intrinsic::log:
case Intrinsic::log10:
case Intrinsic::log2:
Expand Down Expand Up @@ -108,6 +109,8 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
case Intrinsic::canonicalize:
case Intrinsic::fptosi_sat:
case Intrinsic::fptoui_sat:
case Intrinsic::lround:
case Intrinsic::llround:
case Intrinsic::lrint:
case Intrinsic::llrint:
case Intrinsic::ucmp:
Expand Down Expand Up @@ -189,6 +192,8 @@ bool llvm::isVectorIntrinsicWithOverloadTypeAtArg(
switch (ID) {
case Intrinsic::fptosi_sat:
case Intrinsic::fptoui_sat:
case Intrinsic::lround:
case Intrinsic::llround:
case Intrinsic::lrint:
case Intrinsic::llrint:
case Intrinsic::vp_lrint:
Expand All @@ -203,6 +208,7 @@ bool llvm::isVectorIntrinsicWithOverloadTypeAtArg(
case Intrinsic::vp_is_fpclass:
return OpdIdx == 0;
case Intrinsic::powi:
case Intrinsic::ldexp:
return OpdIdx == -1 || OpdIdx == 1;
default:
return OpdIdx == -1;
Expand Down
201 changes: 201 additions & 0 deletions llvm/test/Transforms/LoopVectorize/intrinsic.ll
Original file line number Diff line number Diff line change
Expand Up @@ -324,6 +324,56 @@ for.end: ; preds = %for.body, %entry

declare double @llvm.exp2.f64(double)

define void @ldexp_f32i32(i32 %n, ptr %y, ptr %x, i32 %exp) {
; CHECK-LABEL: @ldexp_f32i32(
; CHECK: llvm.ldexp.v4f32.v4i32
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds float, ptr %y, i32 %iv
%0 = load float, ptr %arrayidx, align 4
%call = tail call float @llvm.ldexp.f32.i32(float %0, i32 %exp)
%arrayidx2 = getelementptr inbounds float, ptr %x, i32 %iv
store float %call, ptr %arrayidx2, align 4
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare float @llvm.ldexp.f32.i32(float, i32)

define void @ldexp_f64i32(i32 %n, ptr %y, ptr %x, i32 %exp) {
; CHECK-LABEL: @ldexp_f64i32(
; CHECK: llvm.ldexp.v4f64.v4i32
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds double, ptr %y, i32 %iv
%0 = load double, ptr %arrayidx, align 8
%call = tail call double @llvm.ldexp.f64.i32(double %0, i32 %exp)
%arrayidx2 = getelementptr inbounds double, ptr %x, i32 %iv
store double %call, ptr %arrayidx2, align 8
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare double @llvm.ldexp.f64.i32(double, i32)

define void @log_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log_f32(
; CHECK: llvm.log.v4f32
Expand Down Expand Up @@ -976,6 +1026,157 @@ for.end: ; preds = %for.body, %entry

declare double @llvm.roundeven.f64(double)


define void @lround_i32f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i32f32(
; CHECK: llvm.lround.v4i32.v4f32
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds float, ptr %y, i32 %iv
%0 = load float, ptr %arrayidx, align 4
%call = tail call i32 @llvm.lround.i32.f32(float %0)
%arrayidx2 = getelementptr inbounds i32, ptr %x, i32 %iv
store i32 %call, ptr %arrayidx2, align 4
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare i32 @llvm.lround.i32.f32(float)

define void @lround_i32f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i32f64(
; CHECK: llvm.lround.v4i32.v4f64
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds double, ptr %y, i32 %iv
%0 = load double, ptr %arrayidx, align 8
%call = tail call i32 @llvm.lround.i32.f64(double %0)
%arrayidx2 = getelementptr inbounds i32, ptr %x, i32 %iv
store i32 %call, ptr %arrayidx2, align 8
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare i32 @llvm.lround.i32.f64(double)

define void @lround_i64f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i64f32(
; CHECK: llvm.lround.v4i64.v4f32
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds float, ptr %y, i32 %iv
%0 = load float, ptr %arrayidx, align 4
%call = tail call i64 @llvm.lround.i64.f32(float %0)
%arrayidx2 = getelementptr inbounds i64, ptr %x, i32 %iv
store i64 %call, ptr %arrayidx2, align 4
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare i64 @llvm.lround.i64.f32(float)

define void @lround_i64f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i64f64(
; CHECK: llvm.lround.v4i64.v4f64
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds double, ptr %y, i32 %iv
%0 = load double, ptr %arrayidx, align 8
%call = tail call i64 @llvm.lround.i64.f64(double %0)
%arrayidx2 = getelementptr inbounds i64, ptr %x, i32 %iv
store i64 %call, ptr %arrayidx2, align 8
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare i64 @llvm.lround.i64.f64(double)

define void @llround_i64f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @llround_i64f32(
; CHECK: llvm.llround.v4i64.v4f32
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds float, ptr %y, i32 %iv
%0 = load float, ptr %arrayidx, align 4
%call = tail call i64 @llvm.llround.i64.f32(float %0)
%arrayidx2 = getelementptr inbounds i64, ptr %x, i32 %iv
store i64 %call, ptr %arrayidx2, align 4
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare i64 @llvm.llround.i64.f32(float)

define void @llround_i64f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @llround_i64f64(
; CHECK: llvm.llround.v4i64.v4f64
; CHECK: ret void
;
entry:
br label %for.body

for.body: ; preds = %entry, %for.body
%iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
%arrayidx = getelementptr inbounds double, ptr %y, i32 %iv
%0 = load double, ptr %arrayidx, align 8
%call = tail call i64 @llvm.llround.i64.f64(double %0)
%arrayidx2 = getelementptr inbounds i64, ptr %x, i32 %iv
store i64 %call, ptr %arrayidx2, align 8
%iv.next = add i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare i64 @llvm.llround.i64.f64(double)

define void @fma_f32(i32 %n, ptr %y, ptr %x, ptr %z, ptr %w) {
; CHECK-LABEL: @fma_f32(
; CHECK: llvm.fma.v4f32
Expand Down
Loading