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5 changes: 5 additions & 0 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16476,6 +16476,11 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,

const TargetRegisterClass *RC = nullptr;
if (Constraint.size() == 1) {
// Check if we cannot determine the bit size of the given value type. This
// can happen, for example, in this situation where we have an empty struct
// (size 0): `call void asm "", "v"({} poison)`-
if (VT == MVT::Other)
return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
const unsigned BitWidth = VT.getSizeInBits();
switch (Constraint[0]) {
default:
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6 changes: 6 additions & 0 deletions llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,12 @@ define amdgpu_kernel void @v_input_output_i8() {
ret void
}

; GCN: error: couldn't allocate input reg for constraint 'v'
define amdgpu_kernel void @v_input_empty_struct() {
call void asm "", "v"({} poison)
ret void
}

; SICI: error: couldn't allocate output register for constraint 's'
; SICI: error: couldn't allocate input reg for constraint 's'
; VI-NOT: error
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