Skip to content

[SelectionDAG] Pass SDValue to InstrEmitter::EmitCopyFromReg. NFC #153485

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Aug 14, 2025
Merged

[SelectionDAG] Pass SDValue to InstrEmitter::EmitCopyFromReg. NFC #153485

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
fda7b7e
[SelectionDAG] Pass SDValue to InstrEmitter::EmitCopyFromReg. NFC
topperc Aug 13, 2025
a98e619
Merge remote-tracking branch 'origin/main' into pr/copyfromreg
topperc Aug 13, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
29 changes: 12 additions & 17 deletions llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -81,12 +81,11 @@ static unsigned countOperands(SDNode *Node, unsigned NumExpUses,

/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
/// implicit physical register output.
void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
Register SrcReg, VRBaseMapType &VRBaseMap) {
void InstrEmitter::EmitCopyFromReg(SDValue Op, bool IsClone, Register SrcReg,
VRBaseMapType &VRBaseMap) {
Register VRBase;
if (SrcReg.isVirtual()) {
// Just use the input register directly!
SDValue Op(Node, ResNo);
if (IsClone)
VRBaseMap.erase(Op);
bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second;
Expand All @@ -99,17 +98,15 @@ void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
// the CopyToReg'd destination register instead of creating a new vreg.
bool MatchReg = true;
const TargetRegisterClass *UseRC = nullptr;
MVT VT = Node->getSimpleValueType(ResNo);
MVT VT = Op.getSimpleValueType();

// Stick to the preferred register classes for legal types.
if (TLI->isTypeLegal(VT))
UseRC = TLI->getRegClassFor(VT, Node->isDivergent());
UseRC = TLI->getRegClassFor(VT, Op->isDivergent());

for (SDNode *User : Node->users()) {
for (SDNode *User : Op->users()) {
bool Match = true;
if (User->getOpcode() == ISD::CopyToReg &&
User->getOperand(2).getNode() == Node &&
User->getOperand(2).getResNo() == ResNo) {
if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2) == Op) {
Register DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
if (DestReg.isVirtual()) {
VRBase = DestReg;
Expand All @@ -118,10 +115,8 @@ void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
Match = false;
} else {
for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
SDValue Op = User->getOperand(i);
if (Op.getNode() != Node || Op.getResNo() != ResNo)
if (User->getOperand(i) != Op)
continue;
MVT VT = Node->getSimpleValueType(Op.getResNo());
Copy link
Collaborator Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I remove this VT variable because it should be the same as the VT outside the loop. Op.getResNo() here is the same as ResNo due the previous if. The ResNo check was not in the previous if when this line was originally written. I think it should be impossible for VT to ever be Other or Glue here but removing that check as out of scope for this patch.

if (VT == MVT::Other || VT == MVT::Glue)
continue;
Match = false;
Expand Down Expand Up @@ -170,11 +165,11 @@ void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
} else {
// Create the reg, emit the copy.
VRBase = MRI->createVirtualRegister(DstRC);
BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
VRBase).addReg(SrcReg);
BuildMI(*MBB, InsertPos, Op.getDebugLoc(), TII->get(TargetOpcode::COPY),
VRBase)
.addReg(SrcReg);
}

SDValue Op(Node, ResNo);
if (IsClone)
VRBaseMap.erase(Op);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
Expand Down Expand Up @@ -1170,7 +1165,7 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
continue;
// This implicitly defined physreg has a use.
UsedRegs.push_back(Reg);
EmitCopyFromReg(Node, i, IsClone, Reg, VRBaseMap);
EmitCopyFromReg(SDValue(Node, i), IsClone, Reg, VRBaseMap);
}
}

Expand Down Expand Up @@ -1283,7 +1278,7 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
}
case ISD::CopyFromReg: {
Register SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
EmitCopyFromReg(Node, 0, IsClone, SrcReg, VRBaseMap);
EmitCopyFromReg(SDValue(Node, 0), IsClone, SrcReg, VRBaseMap);
break;
}
case ISD::EH_LABEL:
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -48,8 +48,8 @@ class LLVM_LIBRARY_VISIBILITY InstrEmitter {

/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
/// implicit physical register output.
void EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
Register SrcReg, VRBaseMapType &VRBaseMap);
void EmitCopyFromReg(SDValue Op, bool IsClone, Register SrcReg,
VRBaseMapType &VRBaseMap);

void CreateVirtualRegisters(SDNode *Node,
MachineInstrBuilder &MIB,
Expand Down
Loading