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@sarnex sarnex commented Aug 14, 2025

Use the generic AS as the default AS for Intel-flavored SPIR-V.

Nobody is using the spirv64-intel triple right now as far as I know, I'm planning to use it for OpenMP offload and we will definitely need generic AS as default there.

@sarnex sarnex marked this pull request as ready for review August 14, 2025 19:14
@llvmbot llvmbot added clang Clang issues not falling into any other category clang:frontend Language frontend issues, e.g. anything involving "Sema" backend:SPIR-V labels Aug 14, 2025
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llvmbot commented Aug 14, 2025

@llvm/pr-subscribers-backend-spir-v

Author: Nick Sarnie (sarnex)

Changes

Use the generic AS as the default AS for Intel-flavored SPIR-V.

Nobody is using the spirv64-intel triple right now as far as I know, I'm planning to use it for OpenMP offload and we will definitely need generic AS as default there.


Full diff: https://github.com/llvm/llvm-project/pull/153647.diff

2 Files Affected:

  • (modified) clang/lib/Basic/Targets/SPIR.h (+5-2)
  • (added) clang/test/CodeGenSPIRV/spirv-intel.c (+9)
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 9d0ced2afdbc7..72a786084f6f7 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -219,8 +219,11 @@ class LLVM_LIBRARY_VISIBILITY BaseSPIRTargetInfo : public TargetInfo {
     setAddressSpaceMap(
         /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
         // The address mapping from HIP/CUDA language for device code is only
-        // defined for SPIR-V.
-        (getTriple().isSPIRV() && Opts.CUDAIsDevice));
+        // defined for SPIR-V, and all Intel SPIR-V code should have the default
+        // AS as generic.
+        (getTriple().isSPIRV() &&
+         (Opts.CUDAIsDevice ||
+          getTriple().getVendor() == llvm::Triple::Intel)));
   }
 
   void setSupportedOpenCLOpts() override {
diff --git a/clang/test/CodeGenSPIRV/spirv-intel.c b/clang/test/CodeGenSPIRV/spirv-intel.c
new file mode 100644
index 0000000000000..3cfe09f0c542b
--- /dev/null
+++ b/clang/test/CodeGenSPIRV/spirv-intel.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s
+// RUN: %clang_cc1 -triple spirv32-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s
+// RUN: %clang_cc1 -triple spir-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s
+// RUN: %clang_cc1 -triple spir64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s
+
+// CHECK-WITH: spir_func void @foo(ptr addrspace(4) noundef %param) #0 {
+// CHECK-WITHOUT: spir_func void @foo(ptr noundef %param) #0 {
+void foo(int *param) {
+}

@llvmbot
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llvmbot commented Aug 14, 2025

@llvm/pr-subscribers-clang

Author: Nick Sarnie (sarnex)

Changes

Use the generic AS as the default AS for Intel-flavored SPIR-V.

Nobody is using the spirv64-intel triple right now as far as I know, I'm planning to use it for OpenMP offload and we will definitely need generic AS as default there.


Full diff: https://github.com/llvm/llvm-project/pull/153647.diff

2 Files Affected:

  • (modified) clang/lib/Basic/Targets/SPIR.h (+5-2)
  • (added) clang/test/CodeGenSPIRV/spirv-intel.c (+9)
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 9d0ced2afdbc7..72a786084f6f7 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -219,8 +219,11 @@ class LLVM_LIBRARY_VISIBILITY BaseSPIRTargetInfo : public TargetInfo {
     setAddressSpaceMap(
         /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
         // The address mapping from HIP/CUDA language for device code is only
-        // defined for SPIR-V.
-        (getTriple().isSPIRV() && Opts.CUDAIsDevice));
+        // defined for SPIR-V, and all Intel SPIR-V code should have the default
+        // AS as generic.
+        (getTriple().isSPIRV() &&
+         (Opts.CUDAIsDevice ||
+          getTriple().getVendor() == llvm::Triple::Intel)));
   }
 
   void setSupportedOpenCLOpts() override {
diff --git a/clang/test/CodeGenSPIRV/spirv-intel.c b/clang/test/CodeGenSPIRV/spirv-intel.c
new file mode 100644
index 0000000000000..3cfe09f0c542b
--- /dev/null
+++ b/clang/test/CodeGenSPIRV/spirv-intel.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s
+// RUN: %clang_cc1 -triple spirv32-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s
+// RUN: %clang_cc1 -triple spir-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s
+// RUN: %clang_cc1 -triple spir64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s
+
+// CHECK-WITH: spir_func void @foo(ptr addrspace(4) noundef %param) #0 {
+// CHECK-WITHOUT: spir_func void @foo(ptr noundef %param) #0 {
+void foo(int *param) {
+}

@sarnex sarnex merged commit 4eec28c into llvm:main Aug 25, 2025
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4 participants