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AMDGPU: Refactor lowering of s_barrier to split barriers #154648
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| //===-- AMDGPULowerIntrinsics.cpp -------------------------------------------=// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
| // | ||
| // Lower intrinsics that would otherwise require separate handling in both | ||
| // SelectionDAG and GlobalISel. | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
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| #include "AMDGPU.h" | ||
| #include "AMDGPUTargetMachine.h" | ||
| #include "GCNSubtarget.h" | ||
| #include "llvm/IR/IRBuilder.h" | ||
| #include "llvm/IR/IntrinsicInst.h" | ||
| #include "llvm/IR/IntrinsicsAMDGPU.h" | ||
| #include "llvm/InitializePasses.h" | ||
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| #define DEBUG_TYPE "amdgpu-lower-intrinsics" | ||
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| using namespace llvm; | ||
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| namespace { | ||
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| class AMDGPULowerIntrinsicsImpl { | ||
| public: | ||
| Module &M; | ||
| const AMDGPUTargetMachine &TM; | ||
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| AMDGPULowerIntrinsicsImpl(Module &M, const AMDGPUTargetMachine &TM) | ||
| : M(M), TM(TM) {} | ||
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| bool run(); | ||
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| private: | ||
| bool visitBarrier(IntrinsicInst &I); | ||
| }; | ||
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| class AMDGPULowerIntrinsicsLegacy : public ModulePass { | ||
| public: | ||
| static char ID; | ||
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| AMDGPULowerIntrinsicsLegacy() : ModulePass(ID) {} | ||
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| bool runOnModule(Module &M) override; | ||
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| void getAnalysisUsage(AnalysisUsage &AU) const override { | ||
| AU.addRequired<TargetPassConfig>(); | ||
| AU.setPreservesCFG(); | ||
| } | ||
| }; | ||
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| template <class T> static void forEachCall(Function &Intrin, T Callback) { | ||
| for (User *U : make_early_inc_range(Intrin.users())) { | ||
| if (auto *CI = dyn_cast<IntrinsicInst>(U)) | ||
| Callback(CI); | ||
| } | ||
| } | ||
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| } // anonymous namespace | ||
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| bool AMDGPULowerIntrinsicsImpl::run() { | ||
| bool Changed = false; | ||
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| for (Function &F : M) { | ||
| switch (F.getIntrinsicID()) { | ||
| default: | ||
| continue; | ||
| case Intrinsic::amdgcn_s_barrier: | ||
| case Intrinsic::amdgcn_s_barrier_signal: | ||
| case Intrinsic::amdgcn_s_barrier_signal_isfirst: | ||
| case Intrinsic::amdgcn_s_barrier_wait: | ||
| forEachCall(F, [&](IntrinsicInst *II) { Changed |= visitBarrier(*II); }); | ||
| break; | ||
| } | ||
| } | ||
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| return Changed; | ||
| } | ||
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| // Optimize barriers and lower s_barrier to a sequence of split barrier | ||
| // intrinsics. | ||
| bool AMDGPULowerIntrinsicsImpl::visitBarrier(IntrinsicInst &I) { | ||
| assert(I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier || | ||
| I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier_signal || | ||
| I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier_signal_isfirst || | ||
| I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier_wait); | ||
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| const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(*I.getFunction()); | ||
| bool IsSingleWaveWG = false; | ||
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| if (TM.getOptLevel() > CodeGenOptLevel::None) { | ||
| unsigned WGMaxSize = ST.getFlatWorkGroupSizes(*I.getFunction()).second; | ||
| IsSingleWaveWG = WGMaxSize <= ST.getWavefrontSize(); | ||
| } | ||
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| IRBuilder<> B(&I); | ||
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| if (IsSingleWaveWG) { | ||
| // Down-grade waits, remove split signals. | ||
| if (I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier || | ||
| I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier_wait) { | ||
| B.CreateIntrinsic(B.getVoidTy(), Intrinsic::amdgcn_wave_barrier, {}); | ||
| } else if (I.getIntrinsicID() == | ||
| Intrinsic::amdgcn_s_barrier_signal_isfirst) { | ||
| // If we're the only wave of the workgroup, we're always first. | ||
| I.replaceAllUsesWith(B.getInt1(true)); | ||
| } | ||
| I.eraseFromParent(); | ||
| return true; | ||
| } | ||
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| if (I.getIntrinsicID() == Intrinsic::amdgcn_s_barrier && | ||
| ST.hasSplitBarriers()) { | ||
| // Lower to split barriers. | ||
| Value *BarrierID_32 = B.getInt32(AMDGPU::Barrier::WORKGROUP); | ||
| Value *BarrierID_16 = B.getInt16(AMDGPU::Barrier::WORKGROUP); | ||
| B.CreateIntrinsic(B.getVoidTy(), Intrinsic::amdgcn_s_barrier_signal, | ||
| {BarrierID_32}); | ||
| B.CreateIntrinsic(B.getVoidTy(), Intrinsic::amdgcn_s_barrier_wait, | ||
| {BarrierID_16}); | ||
| I.eraseFromParent(); | ||
| return true; | ||
| } | ||
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| return false; | ||
| } | ||
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| PreservedAnalyses AMDGPULowerIntrinsicsPass::run(Module &M, | ||
| ModuleAnalysisManager &MAM) { | ||
| AMDGPULowerIntrinsicsImpl Impl(M, TM); | ||
| if (!Impl.run()) | ||
| return PreservedAnalyses::all(); | ||
| PreservedAnalyses PA; | ||
| PA.preserveSet<CFGAnalyses>(); | ||
| return PA; | ||
| } | ||
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| bool AMDGPULowerIntrinsicsLegacy::runOnModule(Module &M) { | ||
| auto &TPC = getAnalysis<TargetPassConfig>(); | ||
| const AMDGPUTargetMachine &TM = TPC.getTM<AMDGPUTargetMachine>(); | ||
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| AMDGPULowerIntrinsicsImpl Impl(M, TM); | ||
| return Impl.run(); | ||
| } | ||
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| #define PASS_DESC "AMDGPU lower intrinsics" | ||
| INITIALIZE_PASS_BEGIN(AMDGPULowerIntrinsicsLegacy, DEBUG_TYPE, PASS_DESC, false, | ||
| false) | ||
| INITIALIZE_PASS_DEPENDENCY(TargetPassConfig) | ||
| INITIALIZE_PASS_END(AMDGPULowerIntrinsicsLegacy, DEBUG_TYPE, PASS_DESC, false, | ||
| false) | ||
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| char AMDGPULowerIntrinsicsLegacy::ID = 0; | ||
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| ModulePass *llvm::createAMDGPULowerIntrinsicsLegacyPass() { | ||
| return new AMDGPULowerIntrinsicsLegacy; | ||
| } | ||
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This isn't so much code that duplicating between globalisel and selection dag is a problem. Is a whole pass really needed for this one tiny case? Can we get this into one of the existing IR lowering passes (e.g. PreISelIntrinsicLowering)?
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PreISelIntrinsicLowering doesn't handle target-specific intrinsics. So is it better to teach that pass how to call into target hooks to handle target intrinsics, or to have a target-specific pass like in this patch?
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I've looked at this. We could perhaps add a hook to TargetTransformInfo, but it feels a bit out of place. PreISelIntrinsicLowering iterates over the functions of the module and looks at calls from there, which means that hooking anything into that pass would basically only re-use this loop over the functions of the module.
I can sort of see the point about breaking the module pass manager (although -- isn't it really the other way around? Breaking up a function pass manager hurts, but a function pass inside a module pass manager ought to be fairly unproblematic), and perhaps a larger point that iterating over all code just for this is a bit excessive.
So I'm going to change this into a module pass that iterates like PreISelIntrinsicLowering.
As for how much code this is: I ran into this precisely because it's about to become a whole lot more code in the near future. This change is simply trying to prepare upstream for that.