Skip to content

[AMDGPU][SPIRV] Use SPIR-V syncscopes for some AMDGCN BIs #154867

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 8 commits into from
Sep 29, 2025
Merged

[AMDGPU][SPIRV] Use SPIR-V syncscopes for some AMDGCN BIs #154867

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
8 commits
Select commit Hold shift + click to select a range
f65fa1d
Use "device" instead of "agent" and "subgroup" instead of "wavefront"…
AlexVlx Aug 22, 2025
4d6413c
Hoist scope mapping into named function.
AlexVlx Aug 22, 2025
577d516
Merge branch 'amdgcn_spirv_syncscopes' of https://github.com/AlexVlx/…
AlexVlx Aug 22, 2025
e744e4d
Fix test.
AlexVlx Aug 22, 2025
71bf5b3
Merge branch 'main' of https://github.com/llvm/llvm-project into amdg…
AlexVlx Aug 27, 2025
bfd0192
Merge branch 'main' into amdgcn_spirv_syncscopes
AlexVlx Sep 3, 2025
e76680e
Merge branches 'amdgcn_spirv_syncscopes' and 'amdgcn_spirv_syncscopes…
AlexVlx Sep 9, 2025
e15d1da
Merge branch 'main' into amdgcn_spirv_syncscopes
AlexVlx Sep 23, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
23 changes: 19 additions & 4 deletions clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,7 @@ static Value *emitFPIntBuiltin(CodeGenFunction &CGF,

// For processing memory ordering and memory scope arguments of various
// amdgcn builtins.
// \p Order takes a C++11 comptabile memory-ordering specifier and converts
// \p Order takes a C++11 compatible memory-ordering specifier and converts
// it into LLVM's memory ordering specifier using atomic C ABI, and writes
// to \p AO. \p Scope takes a const char * and converts it into AMDGCN
// specific SyncScopeID and writes it to \p SSID.
Expand Down Expand Up @@ -227,6 +227,12 @@ void CodeGenFunction::ProcessOrderScopeAMDGCN(Value *Order, Value *Scope,
// Some of the atomic builtins take the scope as a string name.
StringRef scp;
if (llvm::getConstantStringInfo(Scope, scp)) {
if (getTarget().getTriple().isSPIRV()) {
if (scp == "agent")
scp = "device";
else if (scp == "wavefront")
scp = "subgroup";
}
SSID = getLLVMContext().getOrInsertSyncScopeID(scp);
return;
}
Expand All @@ -238,13 +244,19 @@ void CodeGenFunction::ProcessOrderScopeAMDGCN(Value *Order, Value *Scope,
SSID = llvm::SyncScope::System;
break;
case 1: // __MEMORY_SCOPE_DEVICE
SSID = getLLVMContext().getOrInsertSyncScopeID("agent");
if (getTarget().getTriple().isSPIRV())
SSID = getLLVMContext().getOrInsertSyncScopeID("device");
Copy link
Collaborator

@yxsamliu yxsamliu Sep 11, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Will they be translate back to agent when we convert SPIRV to bitcode for amdgcn?

Do we have lit tests to cover that?

Copy link
Contributor Author

@AlexVlx AlexVlx Sep 17, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Yes, reverse translation maps from SPIR-V to AMDGPU; we don't test this in LLVM yet because we don't use the BE, yet, reverse translation is done in the OOT translator.

else
SSID = getLLVMContext().getOrInsertSyncScopeID("agent");
break;
case 2: // __MEMORY_SCOPE_WRKGRP
SSID = getLLVMContext().getOrInsertSyncScopeID("workgroup");
break;
case 3: // __MEMORY_SCOPE_WVFRNT
SSID = getLLVMContext().getOrInsertSyncScopeID("wavefront");
if (getTarget().getTriple().isSPIRV())
SSID = getLLVMContext().getOrInsertSyncScopeID("subgroup");
else
SSID = getLLVMContext().getOrInsertSyncScopeID("wavefront");
break;
case 4: // __MEMORY_SCOPE_SINGLE
SSID = llvm::SyncScope::SingleThread;
Expand Down Expand Up @@ -1381,7 +1393,10 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
//
// The global/flat cases need to use agent scope to consistently produce
// the native instruction instead of a cmpxchg expansion.
SSID = getLLVMContext().getOrInsertSyncScopeID("agent");
if (getTarget().getTriple().isSPIRV())
SSID = getLLVMContext().getOrInsertSyncScopeID("device");
else
SSID = getLLVMContext().getOrInsertSyncScopeID("agent");
AO = AtomicOrdering::Monotonic;

// The v2bf16 builtin uses i16 instead of a natural bfloat type.
Expand Down
Loading
Loading