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[mlir][ArithToAMDGPU] limit scaling truncf/extf support to gfx950 #155431

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Merged
merged 3 commits into from
Sep 17, 2025
Merged

[mlir][ArithToAMDGPU] limit scaling truncf/extf support to gfx950 #155431

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5464787
limit scaling truncf/extf support to gfx950
Muzammiluddin-Syed-ECE Aug 26, 2025
2f2a400
hoist chipset check to variable
Muzammiluddin-Syed-ECE Aug 26, 2025
7e309b6
adding tests
Muzammiluddin-Syed-ECE Aug 27, 2025
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10 changes: 4 additions & 6 deletions mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
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Original file line number Diff line number Diff line change
Expand Up @@ -28,12 +28,10 @@ namespace arith {
/// is set, values outside the range of the destination type are clamped
/// to the largest value of that type instead of being rewritten to Inf (aka
/// NaN).
void populateArithToAMDGPUConversionPatterns(RewritePatternSet &patterns,
bool convertFP8Arithmetic,
bool saturateFP8Truncf,
bool allowPackedF16Rtz,
amdgpu::Chipset chipset,
PatternBenefit benefit = 1);
void populateArithToAMDGPUConversionPatterns(
RewritePatternSet &patterns, bool convertFP8Arithmetic,
bool saturateFP8Truncf, bool allowPackedF16Rtz, bool supportsScaledExtTrunc,
amdgpu::Chipset chipset, PatternBenefit benefit = 1);
} // namespace arith
} // namespace mlir

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9 changes: 5 additions & 4 deletions mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -690,8 +690,8 @@ ScalingTruncFRewritePattern::matchAndRewrite(arith::ScalingTruncFOp op,

void mlir::arith::populateArithToAMDGPUConversionPatterns(
RewritePatternSet &patterns, bool convertFP8Arithmetic,
bool saturateFP8Truncf, bool allowPackedF16Rtz, Chipset chipset,
PatternBenefit benefit) {
bool saturateFP8Truncf, bool allowPackedF16Rtz, bool supportsScaledExtTrunc,
Chipset chipset, PatternBenefit benefit) {

if (convertFP8Arithmetic) {
patterns.add<ExtFOnFloat8RewritePattern>(patterns.getContext(), chipset,
Expand All @@ -702,7 +702,7 @@ void mlir::arith::populateArithToAMDGPUConversionPatterns(
if (allowPackedF16Rtz)
patterns.add<TruncfToFloat16RewritePattern>(patterns.getContext(), benefit);

if (chipset >= kGfx950) {
if (supportsScaledExtTrunc) {
patterns.add<ScalingExtFRewritePattern>(patterns.getContext(), benefit);
patterns.add<ScalingTruncFRewritePattern>(patterns.getContext(), benefit);
}
Expand All @@ -720,9 +720,10 @@ void ArithToAMDGPUConversionPass::runOnOperation() {

bool convertFP8Arithmetic =
*maybeChipset == kGfx942 || hasOcpFp8(*maybeChipset);
bool supportsScaledExtTrunc = *maybeChipset == kGfx950;
arith::populateArithToAMDGPUConversionPatterns(
patterns, convertFP8Arithmetic, saturateFP8Truncf, allowPackedF16Rtz,
*maybeChipset);
supportsScaledExtTrunc, *maybeChipset);
if (failed(applyPatternsGreedily(op, std::move(patterns))))
return signalPassFailure();
}