[TableGen][Decoder] Decode operands with zero width or all bits known #156358

s-barannikov · 2025-09-01T18:05:37Z

There are two classes of operands that DecoderEmitter cannot currently handle:

Operands that do not participate in instruction encoding.
Operands whose encoding contains no '?' bits (that is, only 0s and 1s).

Because of this, targets developed various workarounds. Some targets insert missing operands after an instruction has been (incompletely) decoded, other take into account the missing operands when printing the instruction. Some targets do neither of that and fail to correctly disassemble some instructions.

This patch makes it possible to decode both classes of operands and allows to remove post-decoding instruction adjustments.

For the case of operand with no contribution to instruction encoding, one should now add bits<0> OpName field to instruction encoding record. This will make DecoderEmitter generate a call to the decoder function specified by the operand's DecoderMethod. The function has a signature different from the usual one and looks like this:

static DecodeStatus DecodeImm42Operand(MCInst &Inst, const MCDisassembler *Decoder) {
  Inst.addOperand(MCOperand::createImm(42));
  return DecodeStatus::Success;
}

Notably, encoding bits are not passed to it (since there are none).

There is nothing special about the second case, the operand bits are passed as usual. The difference is that before this change, the function was not called if all the bits of the operand were known (no '?' in the operand encoding).

There are two options controlling the behavior. Passing an option enables the old behavior. They exist to allow smooth transition to the new behavior. They are temporary (yeah, I know) and will be removed once all targets migrate, possibly giving some more time to downstream targets.

Subsequent patches in the stack enable the new behavior on some in-tree targets.

s-barannikov · 2025-09-01T18:05:57Z

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github-actions · 2025-09-01T18:09:05Z

✅ With the latest revision this PR passed the C/C++ code formatter.

s-barannikov · 2025-09-01T18:09:44Z

Something went wrong with the graphite -_-
Sorry if that spammed someone

llvm/utils/TableGen/DecoderEmitter.cpp

jurahul · 2025-09-03T16:41:49Z

Overall, the decoder emitter changes LGTM. I'll let other folks here chime in on the individual target changes.

llvm/utils/TableGen/DecoderEmitter.cpp

jurahul · 2025-09-03T20:41:35Z

Would it also make sense to add this comment?

// Represents a span of bits in the instruction encoding that's based on a span
// of bits in an operand's encoding.
//
// Width is the width of the span.
// Base is the starting position of that span in the instruction encoding.
// Offset if the starting position of that span in the operand's encoding.
// That is, bits {Base + Width - 1, Base} in the instruction encoding form
// bits {Offset + Width - 1, Offset} in the operands encoding.
struct EncodingField {

If you want to incorporate it here, or I can create a separate PR as well.

s-barannikov · 2025-09-03T20:44:43Z

Would it also make sense to add this comment?

// Represents a span of bits in the instruction encoding that's based on a span
// of bits in an operand's encoding.
//
// Width is the width of the span.
// Base is the starting position of that span in the instruction encoding.
// Offset if the starting position of that span in the operand's encoding.
// That is, bits {Base + Width - 1, Base} in the instruction encoding form
// bits {Offset + Width - 1, Offset} in the operands encoding.
struct EncodingField {

If you want to incorporate it here, or I can create a separate PR as well.

Please create a separate PR and also borrow that comment we discussed so that this PR gets smaller after rebasing.

jurahul · 2025-09-03T20:46:03Z

Would it also make sense to add this comment?
// Represents a span of bits in the instruction encoding that's based on a span
// of bits in an operand's encoding.
//
// Width is the width of the span.
// Base is the starting position of that span in the instruction encoding.
// Offset if the starting position of that span in the operand's encoding.
// That is, bits {Base + Width - 1, Base} in the instruction encoding form
// bits {Offset + Width - 1, Offset} in the operands encoding.
struct EncodingField {
If you want to incorporate it here, or I can create a separate PR as well.
Please create a separate PR and also borrow that comment we discussed so that this PR gets smaller after rebasing.

Sounds good, will do,

jurahul · 2025-09-03T20:47:10Z

Borrowed the comment, if you want to revert that part.

The `$asr18` operand is not decoded/encoded/printed, and ASR18 is already in the `Uses` list. Extracted from #156358, where the extra operand causes DecoderEmitter to emit an error about an operand with a missing encoding.

The operand is not encoded, decoded, or printed and would break MCInst verification if we had one. Extracted from #156358, where the extra operand causes DecoderEmitter to emit an error about an operand with a missing encoding.

s-barannikov · 2025-09-04T14:17:03Z

Can I get an approval here? I've extracted most of the target-specific changes into separate PRs, and the ones that remain should be trivial.

llvm-ci · 2025-09-04T15:24:36Z

LLVM Buildbot has detected a new failure on builder llvm-clang-aarch64-darwin running on doug-worker-4 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/190/builds/26729

Here is the relevant piece of the build log for the reference

Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'lld :: MinGW/driver.test' FAILED ********************
Exit Code: 127

Command Output (stdout):
--
# RUN: at line 1
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld -### foo.o -m i386pe 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=X86 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld '-###' foo.o -m i386pe
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=X86 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# note: command had no output on stdout or stderr
# RUN: at line 7
echo "-### foo.o -m i386pe" > /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/tools/lld/test/MinGW/Output/driver.test.tmp.rsp
# executed command: echo '-### foo.o -m i386pe'
# note: command had no output on stdout or stderr
# RUN: at line 8
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld @/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/tools/lld/test/MinGW/Output/driver.test.tmp.rsp 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=X86 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld @/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/tools/lld/test/MinGW/Output/driver.test.tmp.rsp
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=X86 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# note: command had no output on stdout or stderr
# RUN: at line 10
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld -### foo.o -m i386pep 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=X64 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld '-###' foo.o -m i386pep
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=X64 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# note: command had no output on stdout or stderr
# RUN: at line 16
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld -### foo.o -m thumb2pe 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld '-###' foo.o -m thumb2pe
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# note: command had no output on stdout or stderr
# RUN: at line 22
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld -### foo.o -m arm64pe 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM64 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld '-###' foo.o -m arm64pe
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM64 /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# note: command had no output on stdout or stderr
# RUN: at line 28
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld -### foo.o -m arm64ecpe 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM64EC /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld '-###' foo.o -m arm64ecpe
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM64EC /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# note: command had no output on stdout or stderr
# RUN: at line 34
/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld -### foo.o -m arm64xpe 2>&1 | /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM64X /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/ld.lld '-###' foo.o -m arm64xpe
# note: command had no output on stdout or stderr
# executed command: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/bin/FileCheck -check-prefix=ARM64X /Users/buildbot/buildbot-root/llvm-project/lld/test/MinGW/driver.test
...

s-barannikov changed the title ~~[MLIR] Apply clang-tidy fixes for readability-container-size-empty in VectorTransforms.cpp (NFC)~~ [TableGen][Decoder] Decode operands with zero width or all bits known Sep 1, 2025

s-barannikov force-pushed the users/s.barannikov/decoder-operands-0 branch from 3e6a846 to d950e97 Compare September 1, 2025 18:19

s-barannikov requested review from jayfoad, jurahul, davemgreen, topperc and arsenm September 1, 2025 18:54

s-barannikov marked this pull request as ready for review September 1, 2025 18:55

llvmbot added backend:ARM backend:AArch64 backend:AMDGPU backend:Hexagon backend:MIPS backend:RISC-V backend:PowerPC backend:Sparc tablegen backend:m68k backend:CSKY labels Sep 1, 2025

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s-barannikov force-pushed the users/s.barannikov/decoder-operands-0 branch from 1230672 to 2c96e18 Compare September 2, 2025 16:40

s-barannikov mentioned this pull request Sep 2, 2025

[ARM] Remove most post-decoding instruction adjustments #156540

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jurahul reviewed Sep 3, 2025

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jayfoad requested review from kosarev and rampitec September 3, 2025 16:34

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s-barannikov force-pushed the users/s.barannikov/decoder-operands-0 branch 2 times, most recently from 3e5abcd to 99327a7 Compare September 3, 2025 20:17

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This was referenced Sep 3, 2025

[PowerPC] Remove non-existent operand of CP_COPY instruction #153867

Merged

[Sparc] Remove extra ASRRegs operand in SMAC/UMAC instructions #156751

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s-barannikov force-pushed the users/s.barannikov/decoder-operands-0 branch from 99327a7 to 743d22e Compare September 4, 2025 13:37

s-barannikov added 3 commits September 4, 2025 17:14

[TableGen][Decoder] Decode operands with zero width or all bits known

f321cd1

Require that the generated functions return DecodeStatus

de4185f

Add a few comments

a4624de

s-barannikov force-pushed the users/s.barannikov/decoder-operands-0 branch from 743d22e to a4624de Compare September 4, 2025 14:14

jurahul approved these changes Sep 4, 2025

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s-barannikov enabled auto-merge (squash) September 4, 2025 14:30

s-barannikov merged commit ed3597e into main Sep 4, 2025
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s-barannikov deleted the users/s.barannikov/decoder-operands-0 branch September 4, 2025 14:48

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