[Doc][AMDGPU] Document the waitcnts required before SCOPE_SYS stores on GFX12 #156424
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…on GFX12 This case was undocumented until now.
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| * ``s_wait_loadcnt 0x0`` | ||
| * ``s_wait_storecnt 0x0`` | ||
| * ``s_wait_kmcnt 0x0`` | ||
| * ``s_wait_samplecnt 0x0`` | ||
| * ``s_wait_bvhcnt 0x0`` |
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So s_wait_dscnt 0x0 is not needed? I notice it is present for the store release.
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No dscnt isn't needed, this only deals with system scope level stores as the reordering in this case occurs beyond L2.
LDS is always WG level so that causes no issues
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So what does dscnt track, LDS? Why is it not needed for system scope? Remember we have scope inclusion in the memory model.
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DScnt is indeed LDS.
The reordering here can, AFAIK, only occur between two system scope operations. The reordering case happens somewhere after L2.
So we need to wait for any operations that could be at that level. LDS ops aren't one of them because they can't leave the workgroup under any scenario.
llvm/docs/AMDGPUUsage.rst
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| | ``s_wait_storecnt 0x0`` | ||
| | ``s_wait_loadcnt 0x0`` | ||
| | ``s_wait_dscnt 0x0`` | ||
| | ``s_wait_kmcnt 0x0`` |
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For consistency should these be listed in the same order as the changes above?
This case was undocumented until now.