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Merged
woruyu merged 5 commits into from
Sep 11, 2025
Merged

[RISCV][GISel] Lower G_SADDE #156865

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eb81645
[RISCV][GISel] Lower G_SADDE
woruyu Sep 4, 2025
dbb5731
fix: code format
woruyu Sep 4, 2025
1df7582
fix: review
woruyu Sep 4, 2025
422c880
fix: ci test
woruyu Sep 4, 2025
d91853e
fix: modify lowering
woruyu Sep 10, 2025
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1 change: 1 addition & 0 deletions llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
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Original file line number Diff line number Diff line change
Expand Up @@ -510,6 +510,7 @@ class LegalizerHelper {
LLVM_ABI LegalizeResult lowerExtract(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerInsert(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerSADDE(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerAddSubSatToMinMax(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerAddSubSatToAddoSubo(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerShlSat(MachineInstr &MI);
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24 changes: 24 additions & 0 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
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Expand Up @@ -4447,6 +4447,8 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
case TargetOpcode::G_SADDO:
case TargetOpcode::G_SSUBO:
return lowerSADDO_SSUBO(MI);
case TargetOpcode::G_SADDE:
return lowerSADDE(MI);
case TargetOpcode::G_UMULH:
case TargetOpcode::G_SMULH:
return lowerSMULH_UMULH(MI);
Expand Down Expand Up @@ -9298,6 +9300,28 @@ LegalizerHelper::lowerSADDO_SSUBO(MachineInstr &MI) {
return Legalized;
}

LegalizerHelper::LegalizeResult LegalizerHelper::lowerSADDE(MachineInstr &MI) {
auto [Res, OvOut, LHS, RHS, CarryIn] = MI.getFirst5Regs();
const LLT Ty = MRI.getType(Res);

// sum = LHS + RHS + zext(CarryIn)
auto Tmp = MIRBuilder.buildAdd(Ty, LHS, RHS);
auto CarryZ = MIRBuilder.buildZExt(Ty, CarryIn);
auto Sum = MIRBuilder.buildAdd(Ty, Tmp, CarryZ);
MIRBuilder.buildCopy(Res, Sum);

// OvOut = icmp slt ((sum ^ lhs) & (sum ^ rhs)), 0
auto AX = MIRBuilder.buildXor(Ty, Sum, LHS);
auto BX = MIRBuilder.buildXor(Ty, Sum, RHS);
auto T = MIRBuilder.buildAnd(Ty, AX, BX);

auto Zero = MIRBuilder.buildConstant(Ty, 0);
MIRBuilder.buildICmp(CmpInst::ICMP_SLT, OvOut, T, Zero);

MI.eraseFromParent();
return Legalized;
}

LegalizerHelper::LegalizeResult
LegalizerHelper::lowerAddSubSatToMinMax(MachineInstr &MI) {
auto [Res, LHS, RHS] = MI.getFirst3Regs();
Expand Down
4 changes: 3 additions & 1 deletion llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
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Expand Up @@ -151,7 +151,9 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
getActionDefinitionsBuilder(
{G_UADDE, G_UADDO, G_USUBE, G_USUBO}).lower();

getActionDefinitionsBuilder({G_SADDO, G_SSUBO}).minScalar(0, sXLen).lower();
getActionDefinitionsBuilder({G_SADDO, G_SADDE, G_SSUBO})
.minScalar(0, sXLen)
.lower();

// TODO: Use Vector Single-Width Saturating Instructions for vector types.
getActionDefinitionsBuilder(
Expand Down
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
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Expand Up @@ -407,8 +407,9 @@
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_SADDE (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_SSUBO (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
Expand Down
173 changes: 173 additions & 0 deletions llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
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@@ -0,0 +1,173 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck %s

---
name: sadde_i8
body: |
bb.1:
liveins: $x10, $x11, $x12

; CHECK-LABEL: name: sadde_i8
; CHECK: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[ASHR1]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32)
; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[COPY3]](s32), [[ASHR2]]
; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
; CHECK-NEXT: $x11 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s32) = COPY $x10
%1:_(s8) = G_TRUNC %0(s32)
%2:_(s32) = COPY $x11
%3:_(s8) = G_TRUNC %2(s32)
%4:_(s32) = COPY $x12
%5:_(s1) = G_TRUNC %4(s32)
%6:_(s8), %7:_(s1) = G_SADDE %1, %3, %5
%8:_(s32) = G_ANYEXT %6(s8)
%9:_(s32) = G_ANYEXT %7(s1)
$x10 = COPY %8(s32)
$x11 = COPY %9(s32)
PseudoRET implicit $x10, implicit $x11

...
---
name: sadde_i16
body: |
bb.1:
liveins: $x10, $x11, $x12

; CHECK-LABEL: name: sadde_i16
; CHECK: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[ASHR1]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32)
; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[COPY3]](s32), [[ASHR2]]
; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
; CHECK-NEXT: $x11 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s32) = COPY $x10
%1:_(s16) = G_TRUNC %0(s32)
%2:_(s32) = COPY $x11
%3:_(s16) = G_TRUNC %2(s32)
%4:_(s32) = COPY $x12
%5:_(s1) = G_TRUNC %4(s32)
%6:_(s16), %7:_(s1) = G_SADDE %1, %3, %5
%8:_(s32) = G_ANYEXT %6(s16)
%9:_(s32) = G_ANYEXT %7(s1)
$x10 = COPY %8(s32)
$x11 = COPY %9(s32)
PseudoRET implicit $x10, implicit $x11

...
---
name: sadde_i32
body: |
bb.1:
liveins: $x10, $x11, $x12

; CHECK-LABEL: name: sadde_i32
; CHECK: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY]]
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY1]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[XOR1]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[AND1]](s32), [[C1]]
; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
; CHECK-NEXT: $x11 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s32) = COPY $x12
%3:_(s1) = G_TRUNC %2(s32)
%4:_(s32), %5:_(s1) = G_SADDE %0, %1, %3
%6:_(s32) = G_ANYEXT %5(s1)
$x10 = COPY %4(s32)
$x11 = COPY %6(s32)
PseudoRET implicit $x10, implicit $x11

...
---
name: sadde_i64
body: |
bb.1:
liveins: $x10, $x11, $x12, $x13, $x14

; CHECK-LABEL: name: sadde_i64
; CHECK: liveins: $x10, $x11, $x12, $x13, $x14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY2]]
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY]]
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY2]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[XOR1]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[AND1]](s32), [[C1]]
; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY3]]
; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD2]], [[ICMP]]
; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ADD3]](s32)
; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[ADD3]], [[COPY1]]
; CHECK-NEXT: [[XOR3:%[0-9]+]]:_(s32) = G_XOR [[ADD3]], [[COPY3]]
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[XOR2]], [[XOR3]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[AND2]](s32), [[C1]]
; CHECK-NEXT: $x10 = COPY [[COPY5]](s32)
; CHECK-NEXT: $x11 = COPY [[COPY6]](s32)
; CHECK-NEXT: $x12 = COPY [[ICMP1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s32) = COPY $x12
%3:_(s32) = COPY $x13
%4:_(s32) = COPY $x14
%5:_(s1) = G_TRUNC %4(s32)
%6:_(s32), %7:_(s1) = G_SADDE %0, %2, %5
%8:_(s32), %9:_(s1) = G_SADDE %1, %3, %7
%10:_(s32) = G_ANYEXT %9(s1)
$x10 = COPY %6(s32)
$x11 = COPY %8(s32)
$x12 = COPY %10(s32)

PseudoRET implicit $x10, implicit $x11, implicit $x12
...
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