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[AMDGPU] Add MSG_RTN_GET_CLUSTER_BARRIER_STATE #157549

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Merged
merged 2 commits into from
Sep 8, 2025
Merged

[AMDGPU] Add MSG_RTN_GET_CLUSTER_BARRIER_STATE #157549

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4fee562
[AMDGPU] Add MSG_RTN_GET_CLUSTER_BARRIER_STATE
rampitec Sep 8, 2025
89e02f4
Merge branch 'main' into users/rampitec/09-08-_amdgpu_add_msg_rtn_get…
rampitec Sep 8, 2025
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2 changes: 2 additions & 0 deletions llvm/lib/Target/AMDGPU/SIDefines.h
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Original file line number Diff line number Diff line change
Expand Up @@ -458,6 +458,8 @@ enum Id { // Message ID, width(4) [3:0].
ID_RTN_GET_TBA_TO_PC = 134,
ID_RTN_GET_SE_AID_ID = 135,

ID_RTN_GET_CLUSTER_BARRIER_STATE = 136, // added in GFX1250

ID_MASK_PreGFX11_ = 0xF,
ID_MASK_GFX11Plus_ = 0xFF
};
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2 changes: 2 additions & 0 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
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Expand Up @@ -116,6 +116,8 @@ static constexpr CustomOperand MsgOperands[] = {
{{"MSG_RTN_GET_TBA"}, ID_RTN_GET_TBA, isGFX11Plus},
{{"MSG_RTN_GET_TBA_TO_PC"}, ID_RTN_GET_TBA_TO_PC, isGFX11Plus},
{{"MSG_RTN_GET_SE_AID_ID"}, ID_RTN_GET_SE_AID_ID, isGFX12Plus},
{{"MSG_RTN_GET_CLUSTER_BARRIER_STATE"}, ID_RTN_GET_CLUSTER_BARRIER_STATE,
isGFX1250},
};

static constexpr CustomOperand SysMsgOperands[] = {
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25 changes: 25 additions & 0 deletions llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
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Expand Up @@ -268,5 +268,30 @@ define amdgpu_kernel void @test_get_99999_i64(ptr addrspace(1) %out) {
ret void
}

define amdgpu_kernel void @test_get_136_i64(ptr addrspace(1) %out) {
; GFX11-LABEL: test_get_136_i64:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-NEXT: s_sendmsg_rtn_b64 s[2:3], sendmsg(136, 0, 0)
; GFX11-NEXT: v_mov_b32_e32 v2, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX11-NEXT: s_endpgm
;
; GFX1250-LABEL: test_get_136_i64:
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX1250-NEXT: s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE)
; GFX1250-NEXT: v_mov_b32_e32 v2, 0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[2:3]
; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX1250-NEXT: s_endpgm
%ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 136)
store i64 %ret, ptr addrspace(1) %out
ret void
}

declare i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32)
declare i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32)
8 changes: 8 additions & 0 deletions llvm/test/MC/AMDGPU/gfx1250_asm_sop1.s
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Expand Up @@ -45,6 +45,14 @@ s_rfe_i64 s[2:3]
s_rfe_b64 s[2:3]
// GFX1250: s_rfe_i64 s[2:3] ; encoding: [0x02,0x4a,0x80,0xbe]

s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE)
// GFX1250: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE) ; encoding: [0x88,0x4c,0x82,0xbe]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: specified message id is not supported on this GPU

s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE)
// GFX1250: s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE) ; encoding: [0x88,0x4d,0x82,0xbe]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: specified message id is not supported on this GPU

s_get_shader_cycles_u64 s[2:3]
// GFX1250: s_get_shader_cycles_u64 s[2:3] ; encoding: [0x00,0x06,0x82,0xbe]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
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6 changes: 6 additions & 0 deletions llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sop1.txt
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Expand Up @@ -12,6 +12,12 @@
# GFX1250: s_add_pc_i64 s[2:3] ; encoding: [0x02,0x4b,0x80,0xbe]
0x02,0x4b,0x80,0xbe

# GFX1250: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE) ; encoding: [0x88,0x4c,0x82,0xbe]
0x88,0x4c,0x82,0xbe

# GFX1250: s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_CLUSTER_BARRIER_STATE) ; encoding: [0x88,0x4d,0x82,0xbe]
0x88,0x4d,0x82,0xbe

# GFX1250: s_get_shader_cycles_u64 s[2:3] ; encoding: [0x00,0x06,0x82,0xbe]
0x00,0x06,0x82,0xbe

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