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8 changes: 1 addition & 7 deletions llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1941,13 +1941,7 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI,

// LOAD_CNT is only relevant to vgpr or LDS.
unsigned RegNo = FIRST_LDS_VGPR;
// Only objects with alias scope info were added to LDSDMAScopes array.
// In the absense of the scope info we will not be able to disambiguate
// aliasing here. There is no need to try searching for a corresponding
// store slot. This is conservatively correct because in that case we
// will produce a wait using the first (general) LDS DMA wait slot which
// will wait on all of them anyway.
if (Ptr && Memop->getAAInfo() && Memop->getAAInfo().Scope) {
if (Ptr && Memop->getAAInfo()) {
const auto &LDSDMAStores = ScoreBrackets.getLDSDMAStores();
for (unsigned I = 0, E = LDSDMAStores.size(); I != E; ++I) {
if (MI.mayAlias(AA, *LDSDMAStores[I], true))
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1 change: 0 additions & 1 deletion llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,6 @@ define amdgpu_kernel void @test_waitcnt(ptr addrspace(1) %global_buffer, ptr add
; CHECK-NEXT: ds_write_b32 v1, v3
; CHECK-NEXT: ds_write_b32 v2, v3
; CHECK-NEXT: ; sched_barrier mask(0x00000000)
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: ds_read_b32 v1, v1
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: global_store_dword v0, v1, s[0:1] offset:16
Expand Down