[NFC][GlobalISel] Pass APInt by const reference

[abhishek-kaushik22]

Change SpecificConstantMatch constructor and isBuildVectorConstantSplat overloads to take const APInt& instead of by value to avoid unnecessary copies, especially for wide integers.

[llvmbot]

@llvm/pr-subscribers-llvm-globalisel

Author: Abhishek Kaushik (abhishek-kaushik22)

Changes

Change SpecificConstantMatch constructor and isBuildVectorConstantSplat overloads to take const APInt& instead of by value to avoid unnecessary copies, especially for wide integers.

---

Full diff: https://github.com/llvm/llvm-project/pull/157827.diff

3 Files Affected:

• (modified) llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h (+1-1)
• (modified) llvm/include/llvm/CodeGen/GlobalISel/Utils.h (+4-2)
• (modified) llvm/lib/CodeGen/GlobalISel/Utils.cpp (+4-2)

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
index 827cdbdb23c51..b7ccfbb27e51c 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
@@ -193,7 +193,7 @@ m_GFCstOrSplat(std::optional<FPValueAndVReg> &FPValReg) {
 /// Matcher for a specific constant value.
 struct SpecificConstantMatch {
   APInt RequestedVal;
-  SpecificConstantMatch(const APInt RequestedVal)
+  SpecificConstantMatch(const APInt &RequestedVal)
       : RequestedVal(RequestedVal) {}
   bool match(const MachineRegisterInfo &MRI, Register Reg) {
     APInt MatchedVal;
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
index 5c27605c26883..4dce0d39c110e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
@@ -457,7 +457,8 @@ getFConstantSplat(Register VReg, const MachineRegisterInfo &MRI,
 /// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
 LLVM_ABI bool isBuildVectorConstantSplat(const Register Reg,
                                          const MachineRegisterInfo &MRI,
-                                         int64_t SplatValue, bool AllowUndef);
+                                         const APInt &SplatValue,
+                                         bool AllowUndef);
 
 /// Return true if the specified register is defined by G_BUILD_VECTOR or
 /// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
@@ -469,7 +470,8 @@ LLVM_ABI bool isBuildVectorConstantSplat(const Register Reg,
 /// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
 LLVM_ABI bool isBuildVectorConstantSplat(const MachineInstr &MI,
                                          const MachineRegisterInfo &MRI,
-                                         int64_t SplatValue, bool AllowUndef);
+                                         const APInt &SplatValue,
+                                         bool AllowUndef);
 
 /// Return true if the specified instruction is a G_BUILD_VECTOR or
 /// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
diff --git a/llvm/lib/CodeGen/GlobalISel/Utils.cpp b/llvm/lib/CodeGen/GlobalISel/Utils.cpp
index 58d631e569b3a..18c363a652414 100644
--- a/llvm/lib/CodeGen/GlobalISel/Utils.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/Utils.cpp
@@ -1409,7 +1409,8 @@ bool llvm::isBuildVectorConstantSplat(const Register Reg,
 
 bool llvm::isBuildVectorConstantSplat(const Register Reg,
                                       const MachineRegisterInfo &MRI,
-                                      APInt SplatValue, bool AllowUndef) {
+                                      const APInt &SplatValue,
+                                      bool AllowUndef) {
   if (auto SplatValAndReg = getAnyConstantSplat(Reg, MRI, AllowUndef)) {
     if (SplatValAndReg->Value.getBitWidth() < SplatValue.getBitWidth())
       return APInt::isSameValue(
@@ -1431,7 +1432,8 @@ bool llvm::isBuildVectorConstantSplat(const MachineInstr &MI,
 
 bool llvm::isBuildVectorConstantSplat(const MachineInstr &MI,
                                       const MachineRegisterInfo &MRI,
-                                      APInt SplatValue, bool AllowUndef) {
+                                      const APInt &SplatValue,
+                                      bool AllowUndef) {
   return isBuildVectorConstantSplat(MI.getOperand(0).getReg(), MRI, SplatValue,
                                     AllowUndef);
 }

[arsenm]

This change is unrelated to the title. This should probably have APInt and int64_t overloads

[abhishek-kaushik22]

Sorry, I changed the wrong signature. I've fixed it.