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[VectorCombine] Fix scalarizeExtExtract for big-endian #157962
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@llvm/pr-subscribers-backend-powerpc @llvm/pr-subscribers-vectorizers Author: Uyiosa Iyekekpolor (uyoyo0) ChangesThe scalarizeExtExtract transform assumed little-endian lane ordering, This patch updates the shift calculation to handle endianness correctly for big-endian targets. No functional change Full diff: https://github.com/llvm/llvm-project/pull/157962.diff 2 Files Affected:
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 17cb18a22336a..ce785278b32a5 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -2011,12 +2011,19 @@ bool VectorCombine::scalarizeExtExtract(Instruction &I) {
IntegerType::get(SrcTy->getContext(), DL->getTypeSizeInBits(SrcTy)));
uint64_t SrcEltSizeInBits = DL->getTypeSizeInBits(SrcTy->getElementType());
uint64_t EltBitMask = (1ull << SrcEltSizeInBits) - 1;
+ uint64_t TotalBits = DL->getTypeSizeInBits(SrcTy);
+ Type *PackedTy = IntegerType::get(SrcTy->getContext(), TotalBits);
+ Value *Mask = ConstantInt::get(PackedTy, EltBitMask);
for (User *U : Ext->users()) {
auto *Extract = cast<ExtractElementInst>(U);
uint64_t Idx =
cast<ConstantInt>(Extract->getIndexOperand())->getZExtValue();
- Value *LShr = Builder.CreateLShr(ScalarV, Idx * SrcEltSizeInBits);
- Value *And = Builder.CreateAnd(LShr, EltBitMask);
+ uint64_t ShiftAmt = DL->isBigEndian()
+ ? (TotalBits - SrcEltSizeInBits - Idx * SrcEltSizeInBits)
+ : (Idx * SrcEltSizeInBits);
+ Value *ShAmtVal = ConstantInt::get(PackedTy, ShiftAmt);
+ Value *LShr = Builder.CreateLShr(ScalarV, ShAmtVal);
+ Value *And = Builder.CreateAnd(LShr, Mask);
U->replaceAllUsesWith(And);
}
return true;
diff --git a/llvm/test/Transforms/VectorCombine/scalarize-ext-extract-endian.ll b/llvm/test/Transforms/VectorCombine/scalarize-ext-extract-endian.ll
new file mode 100644
index 0000000000000..3a1fbaef3df59
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/scalarize-ext-extract-endian.ll
@@ -0,0 +1,23 @@
+; RUN: opt -passes='vector-combine,dce' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
+; RUN: opt -passes='vector-combine,dce' -S -mtriple=powerpc64-ibm-aix-xcoff %s -o - | FileCheck %s --check-prefix=BE
+
+define i64 @g(<8 x i8> %v) {
+ %z = zext <8 x i8> %v to <8 x i64>
+ %e0 = extractelement <8 x i64> %z, i32 0
+ %e7 = extractelement <8 x i64> %z, i32 7
+ %sum = add i64 %e0, %e7
+ ret i64 %sum
+}
+
+; LE-LABEL: @g(
+; LE: bitcast <8 x i8> %{{.*}} to i64
+; LE: lshr i64 %{{.*}}, 56
+; LE: and i64 %{{.*}}, 255
+; LE-NOT: extractelement
+
+; BE-LABEL: @g(
+; BE: bitcast <8 x i8> %{{.*}} to i64
+; BE: and i64 %{{.*}}, 255
+; BE: lshr i64 %{{.*}}, 56
+; BE-NOT: extractelement
+
|
✅ With the latest revision this PR passed the C/C++ code formatter. |
@@ -0,0 +1,23 @@ | |||
; RUN: opt -passes='vector-combine,dce' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE |
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Don't use triples if the transform doesn't rely on the cost model. Use -data-layout=e/E
instead. If the target triple is needed, you can put the test under target-specific subdirs.
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yes, this fold is cost driven - it will need to be put under the AArch64 subdir and tested on aarch64 / aarch64_be triples
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You can create a PowerPC subdir if you want to retain the powerpc64 triple test coverage - but you will need to duplicate the file
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Done thanks
@uyoyo0 please can you raise an issue for this so we can track it - we probably want to backport this to 21.x |
? (TotalBits - SrcEltSizeInBits - Idx * SrcEltSizeInBits) | ||
: (Idx * SrcEltSizeInBits); | ||
Value *ShAmtVal = ConstantInt::get(PackedTy, ShiftAmt); | ||
Value *LShr = Builder.CreateLShr(ScalarV, ShAmtVal); |
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Why can't we use CreateLShr(ScalarV, ShiftAmt)
?
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Good point, I've updated the branch to use this instead
? (TotalBits - SrcEltSizeInBits - Idx * SrcEltSizeInBits) | ||
: (Idx * SrcEltSizeInBits); | ||
Value *LShr = Builder.CreateLShr(ScalarV, ShiftAmt); | ||
Value *And = Builder.CreateAnd(LShr, Mask); |
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clang-format this bit
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Done thanks
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You'll need to add a lit.local.cfg file to the new PowerPC dir so only ppc capable builds attempt to run the tests
llvm/test/Transforms/VectorCombine/AArch64/scalarize-ext-extract-endian.ll
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@@ -0,0 +1,30 @@ | |||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py | |||
; RUN: opt -passes='vector-combine,dce' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE |
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do you need the dce pass?
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It's not strictly needed but I figured that using dce would make the test output cleaner since the printed IR would only show the bitcast/lshr/and we care about. I don't mind removing it if you prefer to just have vector combine though.
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yes please just show the effects of vectorcombe
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Just made the change thanks
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LGTM - cheers
@uyoyo0 Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR. Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues. How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/190/builds/27429 Here is the relevant piece of the build log for the reference
|
The scalarizeExtExtract transform assumed little-endian lane ordering, causing miscompiles on big-endian targets such as AIX/PowerPC under -O3 -flto. This patch updates the shift calculation to handle endianness correctly for big-endian targets. No functional change for little-endian targets. Fixes llvm#158197. --------- Co-authored-by: Simon Pilgrim <[email protected]> (cherry picked from commit 994a6a3)
The scalarizeExtExtract transform assumed little-endian lane ordering,
causing miscompiles on big-endian targets such as AIX/PowerPC under -O3 -flto.
This patch updates the shift calculation to handle endianness correctly for big-endian targets. No functional change
for little-endian targets.
Fixes #158197.