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[PowerPC][NFC] Pre-commit test case: Implement a more efficient memcmp in cases where the length is known #158367

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Sep 15, 2025
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[PowerPC][NFC] Pre-commit test case: Implement a more efficient memcmp in cases where the length is known #158367

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d0771db
add test case for memcmp_fixsize for powerpc
diggerlin Sep 12, 2025
3a0aa01
add 32-bit test case
diggerlin Sep 12, 2025
ee1488a
remove -verify-machineinstrs
diggerlin Sep 15, 2025
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130 changes: 130 additions & 0 deletions llvm/test/CodeGen/PowerPC/memcmp32_fixsize.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpc-ibm-aix < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-AIX32-P8

; RUN: llc -mcpu=pwr10 -ppc-asm-full-reg-names -mtriple=powerpc-ibm-aix < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-AIX32-P10

; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpcle-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-LINUX32-P8

; RUN: llc -mcpu=pwr10 -ppc-asm-full-reg-names -mtriple=powerpcle-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-LINUX32-P10

define dso_local signext range(i32 0, 2) i32 @cmpeq16(ptr noundef readonly captures(none) %a, ptr noundef readonly captures(none) %b) {
; CHECK-AIX32-P8-LABEL: cmpeq16:
; CHECK-AIX32-P8: # %bb.0: # %entry
; CHECK-AIX32-P8-NEXT: lwz r5, 4(r3)
; CHECK-AIX32-P8-NEXT: lwz r6, 0(r3)
; CHECK-AIX32-P8-NEXT: lwz r7, 4(r4)
; CHECK-AIX32-P8-NEXT: lwz r8, 0(r4)
; CHECK-AIX32-P8-NEXT: xor r6, r6, r8
; CHECK-AIX32-P8-NEXT: xor r5, r5, r7
; CHECK-AIX32-P8-NEXT: or. r5, r5, r6
; CHECK-AIX32-P8-NEXT: bne cr0, L..BB0_2
; CHECK-AIX32-P8-NEXT: # %bb.1: # %loadbb1
; CHECK-AIX32-P8-NEXT: lwz r5, 12(r3)
; CHECK-AIX32-P8-NEXT: lwz r3, 8(r3)
; CHECK-AIX32-P8-NEXT: lwz r6, 12(r4)
; CHECK-AIX32-P8-NEXT: lwz r4, 8(r4)
; CHECK-AIX32-P8-NEXT: xor r3, r3, r4
; CHECK-AIX32-P8-NEXT: xor r4, r5, r6
; CHECK-AIX32-P8-NEXT: or. r3, r4, r3
; CHECK-AIX32-P8-NEXT: li r3, 0
; CHECK-AIX32-P8-NEXT: beq cr0, L..BB0_3
; CHECK-AIX32-P8-NEXT: L..BB0_2: # %res_block
; CHECK-AIX32-P8-NEXT: li r3, 1
; CHECK-AIX32-P8-NEXT: L..BB0_3: # %endblock
; CHECK-AIX32-P8-NEXT: cntlzw r3, r3
; CHECK-AIX32-P8-NEXT: rlwinm r3, r3, 27, 31, 31
; CHECK-AIX32-P8-NEXT: blr
;
; CHECK-AIX32-P10-LABEL: cmpeq16:
; CHECK-AIX32-P10: # %bb.0: # %entry
; CHECK-AIX32-P10-NEXT: lwz r5, 4(r3)
; CHECK-AIX32-P10-NEXT: lwz r6, 0(r3)
; CHECK-AIX32-P10-NEXT: lwz r7, 4(r4)
; CHECK-AIX32-P10-NEXT: xor r5, r5, r7
; CHECK-AIX32-P10-NEXT: lwz r8, 0(r4)
; CHECK-AIX32-P10-NEXT: xor r6, r6, r8
; CHECK-AIX32-P10-NEXT: or. r5, r5, r6
; CHECK-AIX32-P10-NEXT: bne cr0, L..BB0_2
; CHECK-AIX32-P10-NEXT: # %bb.1: # %loadbb1
; CHECK-AIX32-P10-NEXT: lwz r5, 12(r3)
; CHECK-AIX32-P10-NEXT: lwz r3, 8(r3)
; CHECK-AIX32-P10-NEXT: lwz r6, 12(r4)
; CHECK-AIX32-P10-NEXT: lwz r4, 8(r4)
; CHECK-AIX32-P10-NEXT: xor r3, r3, r4
; CHECK-AIX32-P10-NEXT: xor r4, r5, r6
; CHECK-AIX32-P10-NEXT: or. r3, r4, r3
; CHECK-AIX32-P10-NEXT: li r3, 0
; CHECK-AIX32-P10-NEXT: beq cr0, L..BB0_3
; CHECK-AIX32-P10-NEXT: L..BB0_2: # %res_block
; CHECK-AIX32-P10-NEXT: li r3, 1
; CHECK-AIX32-P10-NEXT: L..BB0_3: # %endblock
; CHECK-AIX32-P10-NEXT: cntlzw r3, r3
; CHECK-AIX32-P10-NEXT: rlwinm r3, r3, 27, 31, 31
; CHECK-AIX32-P10-NEXT: blr
;
; CHECK-LINUX32-P8-LABEL: cmpeq16:
; CHECK-LINUX32-P8: # %bb.0: # %entry
; CHECK-LINUX32-P8-NEXT: lwz r5, 0(r3)
; CHECK-LINUX32-P8-NEXT: lwz r6, 4(r3)
; CHECK-LINUX32-P8-NEXT: lwz r7, 0(r4)
; CHECK-LINUX32-P8-NEXT: lwz r8, 4(r4)
; CHECK-LINUX32-P8-NEXT: xor r6, r6, r8
; CHECK-LINUX32-P8-NEXT: xor r5, r5, r7
; CHECK-LINUX32-P8-NEXT: or. r5, r5, r6
; CHECK-LINUX32-P8-NEXT: bne cr0, .LBB0_2
; CHECK-LINUX32-P8-NEXT: # %bb.1: # %loadbb1
; CHECK-LINUX32-P8-NEXT: lwz r5, 8(r3)
; CHECK-LINUX32-P8-NEXT: lwz r3, 12(r3)
; CHECK-LINUX32-P8-NEXT: lwz r6, 8(r4)
; CHECK-LINUX32-P8-NEXT: lwz r4, 12(r4)
; CHECK-LINUX32-P8-NEXT: xor r3, r3, r4
; CHECK-LINUX32-P8-NEXT: xor r4, r5, r6
; CHECK-LINUX32-P8-NEXT: or. r3, r4, r3
; CHECK-LINUX32-P8-NEXT: li r3, 0
; CHECK-LINUX32-P8-NEXT: beq cr0, .LBB0_3
; CHECK-LINUX32-P8-NEXT: .LBB0_2: # %res_block
; CHECK-LINUX32-P8-NEXT: li r3, 1
; CHECK-LINUX32-P8-NEXT: .LBB0_3: # %endblock
; CHECK-LINUX32-P8-NEXT: cntlzw r3, r3
; CHECK-LINUX32-P8-NEXT: rlwinm r3, r3, 27, 31, 31
; CHECK-LINUX32-P8-NEXT: blr
;
; CHECK-LINUX32-P10-LABEL: cmpeq16:
; CHECK-LINUX32-P10: # %bb.0: # %entry
; CHECK-LINUX32-P10-NEXT: lwz r5, 0(r3)
; CHECK-LINUX32-P10-NEXT: lwz r6, 4(r3)
; CHECK-LINUX32-P10-NEXT: lwz r7, 0(r4)
; CHECK-LINUX32-P10-NEXT: xor r5, r5, r7
; CHECK-LINUX32-P10-NEXT: lwz r8, 4(r4)
; CHECK-LINUX32-P10-NEXT: xor r6, r6, r8
; CHECK-LINUX32-P10-NEXT: or. r5, r5, r6
; CHECK-LINUX32-P10-NEXT: bne cr0, .LBB0_2
; CHECK-LINUX32-P10-NEXT: # %bb.1: # %loadbb1
; CHECK-LINUX32-P10-NEXT: lwz r5, 8(r3)
; CHECK-LINUX32-P10-NEXT: lwz r3, 12(r3)
; CHECK-LINUX32-P10-NEXT: lwz r6, 8(r4)
; CHECK-LINUX32-P10-NEXT: lwz r4, 12(r4)
; CHECK-LINUX32-P10-NEXT: xor r3, r3, r4
; CHECK-LINUX32-P10-NEXT: xor r4, r5, r6
; CHECK-LINUX32-P10-NEXT: or. r3, r4, r3
; CHECK-LINUX32-P10-NEXT: li r3, 0
; CHECK-LINUX32-P10-NEXT: beq cr0, .LBB0_3
; CHECK-LINUX32-P10-NEXT: .LBB0_2: # %res_block
; CHECK-LINUX32-P10-NEXT: li r3, 1
; CHECK-LINUX32-P10-NEXT: .LBB0_3: # %endblock
; CHECK-LINUX32-P10-NEXT: cntlzw r3, r3
; CHECK-LINUX32-P10-NEXT: rlwinm r3, r3, 27, 31, 31
; CHECK-LINUX32-P10-NEXT: blr
entry:
%bcmp = tail call i32 @bcmp(ptr noundef nonnull dereferenceable(16) %a, ptr noundef nonnull dereferenceable(16) %b, i32 16)
%cmp = icmp eq i32 %bcmp, 0
%conv = zext i1 %cmp to i32
ret i32 %conv
}

declare signext i32 @bcmp(ptr captures(none), ptr captures(none), i32)

98 changes: 98 additions & 0 deletions llvm/test/CodeGen/PowerPC/memcmp64_fixsize.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpc64-ibm-aix < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-AIX64-32-P8

; RUN: llc -mcpu=pwr10 -ppc-asm-full-reg-names -mtriple=powerpc64-ibm-aix < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-AIX64-32-P10

; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-LINUX64-P8

; RUN: llc -mcpu=pwr10 -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-LINUX64-P10

define dso_local signext range(i32 0, 2) i32 @cmpeq16(ptr noundef readonly captures(none) %a, ptr noundef readonly captures(none) %b) {
; CHECK-AIX64-32-P8-LABEL: cmpeq16:
; CHECK-AIX64-32-P8: # %bb.0: # %entry
; CHECK-AIX64-32-P8-NEXT: ld r5, 0(r3)
; CHECK-AIX64-32-P8-NEXT: ld r6, 0(r4)
; CHECK-AIX64-32-P8-NEXT: cmpld r5, r6
; CHECK-AIX64-32-P8-NEXT: bne cr0, L..BB0_2
; CHECK-AIX64-32-P8-NEXT: # %bb.1: # %loadbb1
; CHECK-AIX64-32-P8-NEXT: ld r5, 8(r3)
; CHECK-AIX64-32-P8-NEXT: ld r4, 8(r4)
; CHECK-AIX64-32-P8-NEXT: li r3, 0
; CHECK-AIX64-32-P8-NEXT: cmpld r5, r4
; CHECK-AIX64-32-P8-NEXT: beq cr0, L..BB0_3
; CHECK-AIX64-32-P8-NEXT: L..BB0_2: # %res_block
; CHECK-AIX64-32-P8-NEXT: li r3, 1
; CHECK-AIX64-32-P8-NEXT: L..BB0_3: # %endblock
; CHECK-AIX64-32-P8-NEXT: cntlzw r3, r3
; CHECK-AIX64-32-P8-NEXT: srwi r3, r3, 5
; CHECK-AIX64-32-P8-NEXT: blr
;
; CHECK-AIX64-32-P10-LABEL: cmpeq16:
; CHECK-AIX64-32-P10: # %bb.0: # %entry
; CHECK-AIX64-32-P10-NEXT: ld r5, 0(r3)
; CHECK-AIX64-32-P10-NEXT: ld r6, 0(r4)
; CHECK-AIX64-32-P10-NEXT: cmpld r5, r6
; CHECK-AIX64-32-P10-NEXT: bne cr0, L..BB0_2
; CHECK-AIX64-32-P10-NEXT: # %bb.1: # %loadbb1
; CHECK-AIX64-32-P10-NEXT: ld r5, 8(r3)
; CHECK-AIX64-32-P10-NEXT: ld r4, 8(r4)
; CHECK-AIX64-32-P10-NEXT: li r3, 0
; CHECK-AIX64-32-P10-NEXT: cmpld r5, r4
; CHECK-AIX64-32-P10-NEXT: beq cr0, L..BB0_3
; CHECK-AIX64-32-P10-NEXT: L..BB0_2: # %res_block
; CHECK-AIX64-32-P10-NEXT: li r3, 1
; CHECK-AIX64-32-P10-NEXT: L..BB0_3: # %endblock
; CHECK-AIX64-32-P10-NEXT: cntlzw r3, r3
; CHECK-AIX64-32-P10-NEXT: rlwinm r3, r3, 27, 31, 31
; CHECK-AIX64-32-P10-NEXT: blr
;
; CHECK-LINUX64-P8-LABEL: cmpeq16:
; CHECK-LINUX64-P8: # %bb.0: # %entry
; CHECK-LINUX64-P8-NEXT: ld r5, 0(r3)
; CHECK-LINUX64-P8-NEXT: ld r6, 0(r4)
; CHECK-LINUX64-P8-NEXT: cmpld r5, r6
; CHECK-LINUX64-P8-NEXT: bne cr0, .LBB0_2
; CHECK-LINUX64-P8-NEXT: # %bb.1: # %loadbb1
; CHECK-LINUX64-P8-NEXT: ld r5, 8(r3)
; CHECK-LINUX64-P8-NEXT: ld r4, 8(r4)
; CHECK-LINUX64-P8-NEXT: li r3, 0
; CHECK-LINUX64-P8-NEXT: cmpld r5, r4
; CHECK-LINUX64-P8-NEXT: beq cr0, .LBB0_3
; CHECK-LINUX64-P8-NEXT: .LBB0_2: # %res_block
; CHECK-LINUX64-P8-NEXT: li r3, 1
; CHECK-LINUX64-P8-NEXT: .LBB0_3: # %endblock
; CHECK-LINUX64-P8-NEXT: cntlzw r3, r3
; CHECK-LINUX64-P8-NEXT: srwi r3, r3, 5
; CHECK-LINUX64-P8-NEXT: blr
;
; CHECK-LINUX64-P10-LABEL: cmpeq16:
; CHECK-LINUX64-P10: # %bb.0: # %entry
; CHECK-LINUX64-P10-NEXT: ld r5, 0(r3)
; CHECK-LINUX64-P10-NEXT: ld r6, 0(r4)
; CHECK-LINUX64-P10-NEXT: cmpld r5, r6
; CHECK-LINUX64-P10-NEXT: bne cr0, .LBB0_2
; CHECK-LINUX64-P10-NEXT: # %bb.1: # %loadbb1
; CHECK-LINUX64-P10-NEXT: ld r5, 8(r3)
; CHECK-LINUX64-P10-NEXT: ld r4, 8(r4)
; CHECK-LINUX64-P10-NEXT: li r3, 0
; CHECK-LINUX64-P10-NEXT: cmpld r5, r4
; CHECK-LINUX64-P10-NEXT: beq cr0, .LBB0_3
; CHECK-LINUX64-P10-NEXT: .LBB0_2: # %res_block
; CHECK-LINUX64-P10-NEXT: li r3, 1
; CHECK-LINUX64-P10-NEXT: .LBB0_3: # %endblock
; CHECK-LINUX64-P10-NEXT: cntlzw r3, r3
; CHECK-LINUX64-P10-NEXT: rlwinm r3, r3, 27, 31, 31
; CHECK-LINUX64-P10-NEXT: blr
entry:
%bcmp = tail call i32 @bcmp(ptr noundef nonnull dereferenceable(16) %a, ptr noundef nonnull dereferenceable(16) %b, i64 16)
%cmp = icmp eq i32 %bcmp, 0
%conv = zext i1 %cmp to i32
ret i32 %conv
}

declare signext i32 @bcmp(ptr captures(none), ptr captures(none), i64)

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