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[RISCV] Add hasREV8Like helper to RISCVSubtarget. NFC #158775

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Merged
topperc merged 2 commits into from
Sep 16, 2025
Merged

[RISCV] Add hasREV8Like helper to RISCVSubtarget. NFC #158775

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137ec5c
[RISCV] Add hasREV8Like helper to RISCVSubtarget. NFC
topperc Sep 16, 2025
2b3bd84
fixup! Address review comment
topperc Sep 16, 2025
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7 changes: 1 addition & 6 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -378,13 +378,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction({ISD::ROTL, ISD::ROTR}, XLenVT, Expand);
}

// With Zbb we have an XLen rev8 instruction, but not GREVI. So we'll
// pattern match it directly in isel.
setOperationAction(ISD::BSWAP, XLenVT,
(Subtarget.hasStdExtZbb() || Subtarget.hasStdExtZbkb() ||
Subtarget.hasVendorXTHeadBb())
? Legal
: Expand);
Subtarget.hasREV8Like() ? Legal : Expand);

if ((Subtarget.hasVendorXCVbitmanip() || Subtarget.hasVendorXqcibm()) &&
!Subtarget.is64Bit()) {
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3 changes: 3 additions & 0 deletions llvm/lib/Target/RISCV/RISCVSubtarget.h
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Expand Up @@ -196,6 +196,9 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
bool hasCPOPLike() const {
return HasStdExtZbb || (HasVendorXCVbitmanip && !IsRV64);
}
bool hasREV8Like() const {
return HasStdExtZbb | HasStdExtZbkb || HasVendorXTHeadBb;
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@lenary lenary Sep 16, 2025

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Did you intend to mix arithmetic and short-circuiting or?

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@topperc topperc Sep 16, 2025

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No I did not. Thanks

}

bool hasBEXTILike() const { return HasStdExtZbs || HasVendorXTHeadBs; }

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