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[NFC][TableGen] Move decoder tests to DecoderEmitter directory #159040

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Merged
jurahul merged 2 commits into from
Sep 16, 2025
Merged

[NFC][TableGen] Move decoder tests to DecoderEmitter directory #159040

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f966878
[NFC][TableGen] Move decoder tests to Decodermitter directory
jurahul Sep 16, 2025
ab92f11
Adjust include path
jurahul Sep 16, 2025
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2 changes: 1 addition & 1 deletion ...est/TableGen/AsmPredicateCondsEmission.td → ...coderEmitter/AsmPredicateCondsEmission.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s

// Check that we don't generate invalid code of the form "( && Cond2)" when
// emitting AssemblerPredicate conditions. In the example below, the invalid
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6 changes: 3 additions & 3 deletions ...n/DecoderEmitterBitwidthSpecialization.td → ...r/DecoderEmitterBitwidthSpecialization.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-DEFAULT
// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-NO-TABLE
// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -use-fn-table-in-decode-to-mcinst -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-TABLE
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-DEFAULT
// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-NO-TABLE
// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -use-fn-table-in-decode-to-mcinst -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-TABLE


include "llvm/Target/Target.td"
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2 changes: 1 addition & 1 deletion llvm/test/TableGen/DecoderEmitterFnTable.td → ...n/DecoderEmitter/DecoderEmitterFnTable.td
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// RUN: llvm-tblgen -gen-disassembler -use-fn-table-in-decode-to-mcinst -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler -use-fn-table-in-decode-to-mcinst -I %p/../../../include %s | FileCheck %s

include "llvm/Target/Target.td"

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4 changes: 2 additions & 2 deletions llvm/test/TableGen/VarLenDecoder.td → .../TableGen/DecoderEmitter/VarLenDecoder.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-LARGE
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-LARGE

include "llvm/Target/Target.td"

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4 changes: 2 additions & 2 deletions llvm/test/TableGen/trydecode-emission.td → ...eGen/DecoderEmitter/trydecode-emission.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE

// Check that if decoding of an instruction fails and the instruction does not
// have a complete decoder method that can determine if the bitpattern is valid
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4 changes: 2 additions & 2 deletions llvm/test/TableGen/trydecode-emission2.td → ...Gen/DecoderEmitter/trydecode-emission2.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE

include "llvm/Target/Target.td"

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4 changes: 2 additions & 2 deletions llvm/test/TableGen/trydecode-emission3.td → ...Gen/DecoderEmitter/trydecode-emission3.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE

include "llvm/Target/Target.td"

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4 changes: 2 additions & 2 deletions llvm/test/TableGen/trydecode-emission4.td → ...Gen/DecoderEmitter/trydecode-emission4.td
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE

// Test for OPC_ExtractField/OPC_CheckField with start bit > 255.
// These large start values may arise for architectures with long instruction
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