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[AMDGPU] Add gfx1251 runlines to cooperative atomcis tests. NFC #159437

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Merged
merged 3 commits into from
Sep 17, 2025
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[AMDGPU] Add gfx1251 runlines to cooperative atomcis tests. NFC #159437

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0219b29
[AMDGPU] Add gfx1251 subtarget
rampitec Sep 17, 2025
1b3d480
[AMDGPU] Add gfx1251 runlines to cooperative atomcis tests. NFC
rampitec Sep 17, 2025
c3d22d0
Merge branch 'main' into users/rampitec/09-17-_amdgpu_add_gfx1251_run…
rampitec Sep 17, 2025
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1 change: 1 addition & 0 deletions clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
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Expand Up @@ -2,6 +2,7 @@

// REQUIRES: amdgpu-registered-target
// RUN: %clang_cc1 -cl-std=CL2.0 -triple amdgcn-unknown-unknown -target-cpu gfx1250 -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -cl-std=CL2.0 -triple amdgcn-unknown-unknown -target-cpu gfx1251 -emit-llvm -o - %s | FileCheck %s

typedef int v2i __attribute__((ext_vector_type(2)));
typedef int v4i __attribute__((ext_vector_type(4)));
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56 changes: 33 additions & 23 deletions llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
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@@ -1,49 +1,59 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GCN,GFX1250,GFX1250-SDAG %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck -check-prefixes=GCN,GFX1251,GFX1251-SDAG %s

; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GCN,GFX1250,GFX1250-GISEL %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck -check-prefixes=GCN,GFX1251,GFX1251-GISEL %s

; this test has both gfx1250/1251 run lines to check availability of the intrinsic on both variants.

; test behavior with unsupported 'consume' and 'acq_rel' ordering

define i32 @test_load_consume(ptr noundef readonly %addr) {
; GFX1250-LABEL: test_load_consume:
; GFX1250: ; %bb.0: ; %entry
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
; GCN-LABEL: test_load_consume:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
; GCN-NEXT: s_wait_kmcnt 0x0
; GCN-NEXT: flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
; GCN-NEXT: s_set_pc_i64 s[30:31]
entry:
%0 = tail call i32 @llvm.amdgcn.cooperative.atomic.load.32x4B.p0(ptr %addr, i32 1, metadata !0)
ret i32 %0
}

define i32 @test_load_acqrel(ptr noundef readonly %addr) {
; GFX1250-LABEL: test_load_acqrel:
; GFX1250: ; %bb.0: ; %entry
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
; GCN-LABEL: test_load_acqrel:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
; GCN-NEXT: s_wait_kmcnt 0x0
; GCN-NEXT: flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
; GCN-NEXT: s_set_pc_i64 s[30:31]
entry:
%0 = tail call i32 @llvm.amdgcn.cooperative.atomic.load.32x4B.p0(ptr %addr, i32 4, metadata !0)
ret i32 %0
}

define void @test_store_acqrel(ptr noundef %addr, i32 noundef %val) {
; GFX1250-LABEL: test_store_acqrel:
; GFX1250: ; %bb.0: ; %entry
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
; GCN-LABEL: test_store_acqrel:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
; GCN-NEXT: s_wait_kmcnt 0x0
; GCN-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
; GCN-NEXT: s_wait_dscnt 0x0
; GCN-NEXT: s_set_pc_i64 s[30:31]
entry:
tail call void @llvm.amdgcn.cooperative.atomic.store.32x4B.p0(ptr %addr, i32 %val, i32 4, metadata !0)
ret void
}

!0 = !{ !"" }

;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX1250: {{.*}}
; GFX1250-GISEL: {{.*}}
; GFX1250-SDAG: {{.*}}
; GFX1251: {{.*}}
; GFX1251-GISEL: {{.*}}
; GFX1251-SDAG: {{.*}}
1 change: 1 addition & 0 deletions llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll
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; RUN: not opt -mtriple=amdgcn -mcpu=gfx1250 -passes=verify -disable-output <%s 2>&1 | FileCheck %s
; RUN: not opt -mtriple=amdgcn -mcpu=gfx1251 -passes=verify -disable-output <%s 2>&1 | FileCheck %s

; CHECK: cooperative atomic intrinsics require a generic or global pointer
define i32 @load_local_as(ptr addrspace(3) noundef %addr) {
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