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[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add SSE/AVX VPTEST/VTESTPD/VTESTPS intrinsics to be used in constexpr #159684

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[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add SSE/AVX VPTEST/VTESTPD/VTESTPS intrinsics to be used in constexpr #159684

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00ec5f9
Mark vector test intrinsics constexpr
monthdev Sep 16, 2025
99b5ecf
Add builtin case statements in VectorExprEvaluator::VisitCallExpr
monthdev Sep 17, 2025
bcca2d1
Add builtin case statements in InterpBuiltin.cpp
monthdev Sep 17, 2025
d6537de
Stash
monthdev Sep 18, 2025
dc03a37
Commit changes for rebase
monthdev Sep 19, 2025
f04932c
Commit changes for clang-format
monthdev Sep 19, 2025
a2e9fa1
Commit changes for clang-format
monthdev Sep 19, 2025
6587f3e
Commit changes for clang-format
monthdev Sep 19, 2025
20fcfaa
Commit changes for clang-format
monthdev Sep 19, 2025
1df0602
Commit changes for clang-format
monthdev Sep 19, 2025
8d256da
Commit changes for clang-format
monthdev Sep 19, 2025
ccf457b
Commit changes for clang-format
monthdev Sep 19, 2025
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Commit changes for clang-format
monthdev Sep 19, 2025
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27 changes: 20 additions & 7 deletions clang/include/clang/Basic/BuiltinsX86.td
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Original file line number Diff line number Diff line change
Expand Up @@ -318,17 +318,25 @@ let Features = "sse4.1", Attributes = [NoThrow, Const, RequiredVectorWidth<128>]
def roundsd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant int)">;
def roundpd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Constant int)">;
def dpps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant char)">;
def dppd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant char)">;
def ptestz128 : X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
def ptestc128 : X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
def ptestnzc128 : X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
def dppd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, "
"_Vector<2,double>, _Constant char)">;
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@RKSimon RKSimon Sep 19, 2025

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(style) don't alter lines not related to the patch

def mpsadbw128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>, _Constant char)">;
def phminposuw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>)">;
def vec_ext_v16qi : X86Builtin<"char(_Vector<16, char>, _Constant int)">;
def vec_set_v16qi : X86Builtin<"_Vector<16, char>(_Vector<16, char>, char, _Constant int)">;
def vec_set_v4si : X86Builtin<"_Vector<4, int>(_Vector<4, int>, int, _Constant int)">;
}

let Features = "sse4.1",
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def ptestz128
: X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
def ptestc128
: X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
def ptestnzc128
: X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
}

let Features = "sse4.1", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def pblendw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>, _Constant int)">;
def blendpd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant int)">;
Expand Down Expand Up @@ -513,8 +521,8 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in
def roundps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Constant int)">;
}


let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
let Features = "avx",
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def vtestzpd : X86Builtin<"int(_Vector<2, double>, _Vector<2, double>)">;
def vtestcpd : X86Builtin<"int(_Vector<2, double>, _Vector<2, double>)">;
def vtestnzcpd : X86Builtin<"int(_Vector<2, double>, _Vector<2, double>)">;
Expand All @@ -523,7 +531,8 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in
def vtestnzcps : X86Builtin<"int(_Vector<4, float>, _Vector<4, float>)">;
}

let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
let Features = "avx",
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
def vtestzpd256 : X86Builtin<"int(_Vector<4, double>, _Vector<4, double>)">;
def vtestcpd256 : X86Builtin<"int(_Vector<4, double>, _Vector<4, double>)">;
def vtestnzcpd256 : X86Builtin<"int(_Vector<4, double>, _Vector<4, double>)">;
Expand All @@ -533,6 +542,10 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in
def ptestz256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
def ptestc256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
def ptestnzc256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
}

let Features = "avx",
Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
def movmskpd256 : X86Builtin<"int(_Vector<4, double>)">;
def movmskps256 : X86Builtin<"int(_Vector<8, float>)">;
}
Expand Down
62 changes: 62 additions & 0 deletions clang/lib/AST/ByteCode/InterpBuiltin.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2851,6 +2851,39 @@ static bool interp__builtin_blend(InterpState &S, CodePtr OpPC,
return true;
}

static bool interp__builtin_ptestz(InterpState &S, CodePtr OpPC,
const CallExpr *Call) {
const Pointer &LHS = S.Stk.pop<Pointer>();
const Pointer &RHS = S.Stk.pop<Pointer>();

assert(LHS.getNumElems() == RHS.getNumElems());
assert(LHS.getFieldDesc()->isPrimitiveArray() &&
RHS.getFieldDesc()->isPrimitiveArray());

if (!S.getASTContext().hasSameUnqualifiedType(getElemType(LHS),
getElemType(RHS)))
return false;

unsigned SourceLen = LHS.getNumElems();
const QualType ElemQT = getElemType(LHS);
const OptPrimType ElemPT = S.getContext().classify(ElemQT);

bool Flag = true;
INT_TYPE_SWITCH_NO_BOOL(*ElemPT, {
for (unsigned I = 0; I < SourceLen; ++I) {
const APSInt A = LHS.elem<T>(I).toAPSInt();
const APSInt B = RHS.elem<T>(I).toAPSInt();
if ((A & B) != 0) {
Flag = false;
break;
}
}
});

pushInteger(S, Flag ? 1 : 0, Call->getType());
return true;
}

static bool interp__builtin_elementwise_triop(
InterpState &S, CodePtr OpPC, const CallExpr *Call,
llvm::function_ref<APInt(const APSInt &, const APSInt &, const APSInt &)>
Expand Down Expand Up @@ -3581,6 +3614,35 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
return ((APInt)C).isNegative() ? T : F;
});

case X86::BI__builtin_ia32_ptestz128:
return interp__builtin_ptestz(S, OpPC, Call);

// case X86::BI__builtin_ia32_ptestz256:

// case X86::BI__builtin_ia32_ptestc128:
// case X86::BI__builtin_ia32_ptestc256:

// case X86::BI__builtin_ia32_ptestnzc128:
// case X86::BI__builtin_ia32_ptestnzc256:

// case X86::BI__builtin_ia32_vtestzps:
// case X86::BI__builtin_ia32_vtestzps256:

// case X86::BI__builtin_ia32_vtestcps:
// case X86::BI__builtin_ia32_vtestcps256:

// case X86::BI__builtin_ia32_vtestnzcps:
// case X86::BI__builtin_ia32_vtestnzcps256:

// case X86::BI__builtin_ia32_vtestzpd:
// case X86::BI__builtin_ia32_vtestzpd256:

// case X86::BI__builtin_ia32_vtestcpd:
// case X86::BI__builtin_ia32_vtestcpd256:

// case X86::BI__builtin_ia32_vtestnzcpd:
// case X86::BI__builtin_ia32_vtestnzcpd256:

case X86::BI__builtin_ia32_selectb_128:
case X86::BI__builtin_ia32_selectb_256:
case X86::BI__builtin_ia32_selectb_512:
Expand Down
50 changes: 50 additions & 0 deletions clang/lib/AST/ExprConstant.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -12025,6 +12025,56 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {

return Success(APValue(ResultElements.data(), ResultElements.size()), E);
}
case X86::BI__builtin_ia32_ptestz128: {
APValue SourceLHS, SourceRHS;
if (!EvaluateAsRValue(Info, E->getArg(0), SourceLHS) ||
!EvaluateAsRValue(Info, E->getArg(1), SourceRHS))
return false;

unsigned SourceLen = SourceLHS.getVectorLength();
bool Flag = true;
for (unsigned I = 0; I < SourceLen; ++I) {
const APInt &A = SourceLHS.getVectorElt(I).getInt();
const APInt &B = SourceRHS.getVectorElt(I).getInt();
if ((A & B) != 0) {
Flag = false;
break;
}
}

QualType ResultType = E->getType();
unsigned BitWidth = Info.Ctx.getIntWidth(ResultType);
bool ResultSigned = ResultType->isUnsignedIntegerOrEnumerationType();
APSInt Result(APInt(BitWidth, Flag), ResultSigned);
return Success(APValue(Result), E);
}

// case X86::BI__builtin_ia32_ptestz256:

// case X86::BI__builtin_ia32_ptestc128:
// case X86::BI__builtin_ia32_ptestc256:

// case X86::BI__builtin_ia32_ptestnzc128:
// case X86::BI__builtin_ia32_ptestnzc256:

// case X86::BI__builtin_ia32_vtestzps:
// case X86::BI__builtin_ia32_vtestzps256:

// case X86::BI__builtin_ia32_vtestcps:
// case X86::BI__builtin_ia32_vtestcps256:

// case X86::BI__builtin_ia32_vtestnzcps:
// case X86::BI__builtin_ia32_vtestnzcps256:

// case X86::BI__builtin_ia32_vtestzpd:
// case X86::BI__builtin_ia32_vtestzpd256:

// case X86::BI__builtin_ia32_vtestcpd:
// case X86::BI__builtin_ia32_vtestcpd256:

// case X86::BI__builtin_ia32_vtestnzcpd:
// case X86::BI__builtin_ia32_vtestnzcpd256:

case Builtin::BI__builtin_elementwise_ctlz:
case Builtin::BI__builtin_elementwise_cttz: {
APValue SourceLHS;
Expand Down
75 changes: 30 additions & 45 deletions clang/lib/Headers/avxintrin.h
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2542,9 +2542,8 @@ _mm256_unpacklo_ps(__m256 __a, __m256 __b) {
/// \param __b
/// A 128-bit vector of [2 x double].
/// \returns the ZF flag in the EFLAGS register.
static __inline int __DEFAULT_FN_ATTRS128
_mm_testz_pd(__m128d __a, __m128d __b)
{
static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testz_pd(__m128d __a,
__m128d __b) {
return __builtin_ia32_vtestzpd((__v2df)__a, (__v2df)__b);
}

Expand All @@ -2571,9 +2570,8 @@ _mm_testz_pd(__m128d __a, __m128d __b)
/// \param __b
/// A 128-bit vector of [2 x double].
/// \returns the CF flag in the EFLAGS register.
static __inline int __DEFAULT_FN_ATTRS128
_mm_testc_pd(__m128d __a, __m128d __b)
{
static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testc_pd(__m128d __a,
__m128d __b) {
return __builtin_ia32_vtestcpd((__v2df)__a, (__v2df)__b);
}

Expand Down Expand Up @@ -2601,9 +2599,8 @@ _mm_testc_pd(__m128d __a, __m128d __b)
/// \param __b
/// A 128-bit vector of [2 x double].
/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
static __inline int __DEFAULT_FN_ATTRS128
_mm_testnzc_pd(__m128d __a, __m128d __b)
{
static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_testnzc_pd(__m128d __a, __m128d __b) {
return __builtin_ia32_vtestnzcpd((__v2df)__a, (__v2df)__b);
}

Expand All @@ -2630,9 +2627,8 @@ _mm_testnzc_pd(__m128d __a, __m128d __b)
/// \param __b
/// A 128-bit vector of [4 x float].
/// \returns the ZF flag.
static __inline int __DEFAULT_FN_ATTRS128
_mm_testz_ps(__m128 __a, __m128 __b)
{
static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testz_ps(__m128 __a,
__m128 __b) {
return __builtin_ia32_vtestzps((__v4sf)__a, (__v4sf)__b);
}

Expand All @@ -2659,9 +2655,8 @@ _mm_testz_ps(__m128 __a, __m128 __b)
/// \param __b
/// A 128-bit vector of [4 x float].
/// \returns the CF flag.
static __inline int __DEFAULT_FN_ATTRS128
_mm_testc_ps(__m128 __a, __m128 __b)
{
static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testc_ps(__m128 __a,
__m128 __b) {
return __builtin_ia32_vtestcps((__v4sf)__a, (__v4sf)__b);
}

Expand Down Expand Up @@ -2689,9 +2684,8 @@ _mm_testc_ps(__m128 __a, __m128 __b)
/// \param __b
/// A 128-bit vector of [4 x float].
/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
static __inline int __DEFAULT_FN_ATTRS128
_mm_testnzc_ps(__m128 __a, __m128 __b)
{
static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testnzc_ps(__m128 __a,
__m128 __b) {
return __builtin_ia32_vtestnzcps((__v4sf)__a, (__v4sf)__b);
}

Expand All @@ -2718,9 +2712,8 @@ _mm_testnzc_ps(__m128 __a, __m128 __b)
/// \param __b
/// A 256-bit vector of [4 x double].
/// \returns the ZF flag.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testz_pd(__m256d __a, __m256d __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testz_pd(__m256d __a,
__m256d __b) {
return __builtin_ia32_vtestzpd256((__v4df)__a, (__v4df)__b);
}

Expand All @@ -2747,9 +2740,8 @@ _mm256_testz_pd(__m256d __a, __m256d __b)
/// \param __b
/// A 256-bit vector of [4 x double].
/// \returns the CF flag.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testc_pd(__m256d __a, __m256d __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testc_pd(__m256d __a,
__m256d __b) {
return __builtin_ia32_vtestcpd256((__v4df)__a, (__v4df)__b);
}

Expand Down Expand Up @@ -2777,9 +2769,8 @@ _mm256_testc_pd(__m256d __a, __m256d __b)
/// \param __b
/// A 256-bit vector of [4 x double].
/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testnzc_pd(__m256d __a, __m256d __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_testnzc_pd(__m256d __a, __m256d __b) {
return __builtin_ia32_vtestnzcpd256((__v4df)__a, (__v4df)__b);
}

Expand All @@ -2806,9 +2797,8 @@ _mm256_testnzc_pd(__m256d __a, __m256d __b)
/// \param __b
/// A 256-bit vector of [8 x float].
/// \returns the ZF flag.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testz_ps(__m256 __a, __m256 __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testz_ps(__m256 __a,
__m256 __b) {
return __builtin_ia32_vtestzps256((__v8sf)__a, (__v8sf)__b);
}

Expand All @@ -2835,9 +2825,8 @@ _mm256_testz_ps(__m256 __a, __m256 __b)
/// \param __b
/// A 256-bit vector of [8 x float].
/// \returns the CF flag.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testc_ps(__m256 __a, __m256 __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testc_ps(__m256 __a,
__m256 __b) {
return __builtin_ia32_vtestcps256((__v8sf)__a, (__v8sf)__b);
}

Expand Down Expand Up @@ -2865,9 +2854,8 @@ _mm256_testc_ps(__m256 __a, __m256 __b)
/// \param __b
/// A 256-bit vector of [8 x float].
/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testnzc_ps(__m256 __a, __m256 __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testnzc_ps(__m256 __a,
__m256 __b) {
return __builtin_ia32_vtestnzcps256((__v8sf)__a, (__v8sf)__b);
}

Expand All @@ -2891,9 +2879,8 @@ _mm256_testnzc_ps(__m256 __a, __m256 __b)
/// \param __b
/// A 256-bit integer vector.
/// \returns the ZF flag.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testz_si256(__m256i __a, __m256i __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_testz_si256(__m256i __a, __m256i __b) {
return __builtin_ia32_ptestz256((__v4di)__a, (__v4di)__b);
}

Expand All @@ -2917,9 +2904,8 @@ _mm256_testz_si256(__m256i __a, __m256i __b)
/// \param __b
/// A 256-bit integer vector.
/// \returns the CF flag.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testc_si256(__m256i __a, __m256i __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_testc_si256(__m256i __a, __m256i __b) {
return __builtin_ia32_ptestc256((__v4di)__a, (__v4di)__b);
}

Expand All @@ -2944,9 +2930,8 @@ _mm256_testc_si256(__m256i __a, __m256i __b)
/// \param __b
/// A 256-bit integer vector.
/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
static __inline int __DEFAULT_FN_ATTRS
_mm256_testnzc_si256(__m256i __a, __m256i __b)
{
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_testnzc_si256(__m256i __a, __m256i __b) {
return __builtin_ia32_ptestnzc256((__v4di)__a, (__v4di)__b);
}

Expand Down
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