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[KnownBits] Add setAllConflict to set all bits in Zero and One. NFC #159815

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Merged
merged 1 commit into from
Sep 19, 2025
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[KnownBits] Add setAllConflict to set all bits in Zero and One. NFC #159815

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7 changes: 7 additions & 0 deletions llvm/include/llvm/Support/KnownBits.h
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Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,13 @@ struct KnownBits {
One.setAllBits();
}

/// Make all bits known to be both zero and one. Useful before a loop that
/// calls intersectWith.
void setAllConflict() {
Zero.setAllBits();
One.setAllBits();
}

/// Returns true if this value is known to be negative.
bool isNegative() const { return One.isSignBitSet(); }

Expand Down
22 changes: 8 additions & 14 deletions llvm/lib/Analysis/ValueTracking.cpp
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Expand Up @@ -441,8 +441,7 @@ void llvm::computeKnownBitsFromRangeMetadata(const MDNode &Ranges,
unsigned NumRanges = Ranges.getNumOperands() / 2;
assert(NumRanges >= 1);

Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();

for (unsigned i = 0; i < NumRanges; ++i) {
ConstantInt *Lower =
Expand Down Expand Up @@ -1328,8 +1327,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
break;

if (Result.isKnownNever(fcNormal | fcSubnormal | fcNan)) {
Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();

if (FPClasses & fcInf)
Known = Known.intersectWith(KnownBits::makeConstant(
Expand Down Expand Up @@ -1405,8 +1403,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
computeKnownBits(I->getOperand(0), SubDemandedElts, KnownSrc, Q,
Depth + 1);

Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
for (unsigned i = 0; i != NumElts; ++i) {
if (DemandedElts[i]) {
unsigned Shifts = IsLE ? i : NumElts - 1 - i;
Expand Down Expand Up @@ -1738,8 +1735,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
if (isa_and_nonnull<UndefValue>(P->hasConstantValue()))
break;

Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
for (const Use &U : P->operands()) {
Value *IncValue;
const PHINode *CxtPhi;
Expand Down Expand Up @@ -2083,8 +2079,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
Known.resetAll();
return;
}
Known.One.setAllBits();
Known.Zero.setAllBits();
Known.setAllConflict();
if (!!DemandedLHS) {
const Value *LHS = Shuf->getOperand(0);
computeKnownBits(LHS, DemandedLHS, Known, Q, Depth + 1);
Expand Down Expand Up @@ -2116,8 +2111,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
NeedsElt = DemandedElts[CIdx->getZExtValue()];
}

Known.One.setAllBits();
Known.Zero.setAllBits();
Known.setAllConflict();
if (NeedsElt) {
computeKnownBits(Elt, Known, Q, Depth + 1);
// If we don't know any bits, early out.
Expand Down Expand Up @@ -2273,7 +2267,7 @@ void computeKnownBits(const Value *V, const APInt &DemandedElts,
assert(!isa<ScalableVectorType>(V->getType()));
// We know that CDV must be a vector of integers. Take the intersection of
// each element.
Known.Zero.setAllBits(); Known.One.setAllBits();
Known.setAllConflict();
for (unsigned i = 0, e = CDV->getNumElements(); i != e; ++i) {
if (!DemandedElts[i])
continue;
Expand All @@ -2290,7 +2284,7 @@ void computeKnownBits(const Value *V, const APInt &DemandedElts,
assert(!isa<ScalableVectorType>(V->getType()));
// We know that CV must be a vector of integers. Take the intersection of
// each element.
Known.Zero.setAllBits(); Known.One.setAllBits();
Known.setAllConflict();
for (unsigned i = 0, e = CV->getNumOperands(); i != e; ++i) {
if (!DemandedElts[i])
continue;
Expand Down
17 changes: 7 additions & 10 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3457,7 +3457,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
case ISD::BUILD_VECTOR:
assert(!Op.getValueType().isScalableVector());
// Collect the known bits that are shared by every demanded vector element.
Known.Zero.setAllBits(); Known.One.setAllBits();
Known.setAllConflict();
for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
if (!DemandedElts[i])
continue;
Expand Down Expand Up @@ -3492,7 +3492,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
break;

// Known bits are the values that are shared by every demanded element.
Known.Zero.setAllBits(); Known.One.setAllBits();
Known.setAllConflict();
if (!!DemandedLHS) {
SDValue LHS = Op.getOperand(0);
Known2 = computeKnownBits(LHS, DemandedLHS, Depth + 1);
Expand All @@ -3518,7 +3518,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
if (Op.getValueType().isScalableVector())
break;
// Split DemandedElts and test each of the demanded subvectors.
Known.Zero.setAllBits(); Known.One.setAllBits();
Known.setAllConflict();
EVT SubVectorVT = Op.getOperand(0).getValueType();
unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
unsigned NumSubVectors = Op.getNumOperands();
Expand Down Expand Up @@ -3549,8 +3549,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
APInt DemandedSrcElts = DemandedElts;
DemandedSrcElts.clearBits(Idx, Idx + NumSubElts);

Known.One.setAllBits();
Known.Zero.setAllBits();
Known.setAllConflict();
if (!!DemandedSubElts) {
Known = computeKnownBits(Sub, DemandedSubElts, Depth + 1);
if (Known.isUnknown())
Expand Down Expand Up @@ -3643,7 +3642,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
APIntOps::ScaleBitMask(DemandedElts, NumElts / SubScale);
Known2 = computeKnownBits(N0, SubDemandedElts, Depth + 1);

Known.Zero.setAllBits(); Known.One.setAllBits();
Known.setAllConflict();
for (unsigned i = 0; i != NumElts; ++i)
if (DemandedElts[i]) {
unsigned Shifts = IsLE ? i : NumElts - 1 - i;
Expand Down Expand Up @@ -3991,8 +3990,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
// TODO - do we need to handle different bitwidths?
if (CstTy->isVectorTy() && BitWidth == CstTy->getScalarSizeInBits()) {
// Iterate across all vector elements finding common known bits.
Known.One.setAllBits();
Known.Zero.setAllBits();
Known.setAllConflict();
for (unsigned i = 0; i != NumElts; ++i) {
if (!DemandedElts[i])
continue;
Expand Down Expand Up @@ -4277,8 +4275,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
DemandedVal = !!DemandedElts[EltIdx];
DemandedVecElts.clearBit(EltIdx);
}
Known.One.setAllBits();
Known.Zero.setAllBits();
Known.setAllConflict();
if (DemandedVal) {
Known2 = computeKnownBits(InVal, Depth + 1);
Known = Known.intersectWith(Known2.zextOrTrunc(BitWidth));
Expand Down
9 changes: 3 additions & 6 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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Expand Up @@ -1331,8 +1331,7 @@ bool TargetLowering::SimplifyDemandedBits(
Depth + 1))
return true;

Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
if (!!DemandedSubElts)
Known = Known.intersectWith(KnownSub);
if (!!DemandedSrcElts)
Expand Down Expand Up @@ -1385,8 +1384,7 @@ bool TargetLowering::SimplifyDemandedBits(
case ISD::CONCAT_VECTORS: {
if (VT.isScalableVector())
return false;
Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
EVT SubVT = Op.getOperand(0).getValueType();
unsigned NumSubVecs = Op.getNumOperands();
unsigned NumSubElts = SubVT.getVectorNumElements();
Expand Down Expand Up @@ -1416,8 +1414,7 @@ bool TargetLowering::SimplifyDemandedBits(
SDValue Op0 = Op.getOperand(0);
SDValue Op1 = Op.getOperand(1);

Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
if (!!DemandedLHS) {
if (SimplifyDemandedBits(Op0, DemandedBits, DemandedLHS, Known2, TLO,
Depth + 1))
Expand Down
9 changes: 3 additions & 6 deletions llvm/lib/Support/KnownBits.cpp
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Expand Up @@ -348,8 +348,7 @@ KnownBits KnownBits::shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW,
// Find the common bits from all possible shifts.
unsigned ShiftAmtZeroMask = RHS.Zero.zextOrTrunc(32).getZExtValue();
unsigned ShiftAmtOneMask = RHS.One.zextOrTrunc(32).getZExtValue();
Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount;
++ShiftAmt) {
// Skip if the shift amount is impossible.
Expand Down Expand Up @@ -405,8 +404,7 @@ KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS,

unsigned ShiftAmtZeroMask = RHS.Zero.zextOrTrunc(32).getZExtValue();
unsigned ShiftAmtOneMask = RHS.One.zextOrTrunc(32).getZExtValue();
Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount;
++ShiftAmt) {
// Skip if the shift amount is impossible.
Expand Down Expand Up @@ -465,8 +463,7 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,

unsigned ShiftAmtZeroMask = RHS.Zero.zextOrTrunc(32).getZExtValue();
unsigned ShiftAmtOneMask = RHS.One.zextOrTrunc(32).getZExtValue();
Known.Zero.setAllBits();
Known.One.setAllBits();
Known.setAllConflict();
for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount;
++ShiftAmt) {
// Skip if the shift amount is impossible.
Expand Down