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AMDGPU: Remove override of TargetInstrInfo::getRegClass #159886

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AMDGPU: Remove override of TargetInstrInfo::getRegClass #159886

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13 changes: 0 additions & 13 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6031,19 +6031,6 @@ SIInstrInfo::getWholeWaveFunctionSetup(MachineFunction &MF) const {
llvm_unreachable("Couldn't find SI_SETUP_WHOLE_WAVE_FUNC instruction");
}

// FIXME: This should not be an overridable function. All subtarget dependent
// operand modifications should go through isLookupRegClassByHwMode in the
// generic handling.
const TargetRegisterClass *
SIInstrInfo::getRegClass(const MCInstrDesc &TID, unsigned OpNum,
const TargetRegisterInfo *TRI) const {
if (OpNum >= TID.getNumOperands())
return nullptr;
const MCOperandInfo &OpInfo = TID.operands()[OpNum];
int16_t RegClass = getOpRegClassID(OpInfo);
return RegClass < 0 ? nullptr : RI.getRegClass(RegClass);
}

const TargetRegisterClass *SIInstrInfo::getOpRegClass(const MachineInstr &MI,
unsigned OpNo) const {
const MCInstrDesc &Desc = get(MI.getOpcode());
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4 changes: 0 additions & 4 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.h
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Expand Up @@ -1562,10 +1562,6 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
/// Return true if this opcode should not be used by codegen.
bool isAsmOnlyOpcode(int MCOp) const;

const TargetRegisterClass *
getRegClass(const MCInstrDesc &TID, unsigned OpNum,
const TargetRegisterInfo *TRI) const override;

void fixImplicitOperands(MachineInstr &MI) const;

MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
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