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[PowerPC] Implement vsx rotate left word instr #160754

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[PowerPC] Implement vsx rotate left word instr #160754

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3 changes: 3 additions & 0 deletions llvm/lib/Target/PowerPC/PPCInstrFuture.td
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Original file line number Diff line number Diff line change
Expand Up @@ -362,6 +362,9 @@ let Predicates = [HasVSX, IsISAFuture] in {
: VXForm_VRTAB5<323, (outs vrrc:$VRT), (ins vrrc:$VRA, vrrc:$VRB),
"vucmprlh $VRT, $VRA, $VRB", []>;

def XVRLW: XX3Form_XTAB6<60, 184, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
"xvrlw $XT, $XA, $XB", []>;

// AES Acceleration Instructions
def XXAESENCP : XX3Form_XTABp5_M2<194, (outs vsrprc:$XTp),
(ins vsrprc:$XAp, vsrprc:$XBp, u2imm:$M),
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3 changes: 3 additions & 0 deletions llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
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Expand Up @@ -232,6 +232,9 @@
#CHECK: vucmprhh 1, 3, 6
0x10,0x23,0x31,0x03

#CHECK: xvrlw 34, 15, 16
0xf0,0x4f,0x85,0xc1

#CHECK: xxaes192encp 8, 10, 14
0xf1,0x0b,0x76,0x10

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3 changes: 3 additions & 0 deletions llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
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Expand Up @@ -226,6 +226,9 @@
#CHECK: vucmprhh 1, 3, 6
0x03,0x31,0x23,0x10

#CHECK: xvrlw 34, 15, 16
0xc1,0x85,0x4f,0xf0

#CHECK: xxaes192encp 8, 10, 14
0x10,0x76,0x0b,0xf1

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4 changes: 4 additions & 0 deletions llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
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Expand Up @@ -331,6 +331,10 @@
#CHECK-BE: vucmprhh 1, 3, 6 # encoding: [0x10,0x23,0x31,0x03]
#CHECK-LE: vucmprhh 1, 3, 6 # encoding: [0x03,0x31,0x23,0x10]

xvrlw 34, 15, 16
#CHECK-BE: xvrlw 34, 15, 16 # encoding: [0xf0,0x4f,0x85,0xc1]
#CHECK-LE: xvrlw 34, 15, 16 # encoding: [0xc1,0x85,0x4f,0xf0]

xxaes192encp 8, 10, 14
#CHECK-BE: xxaes192encp 8, 10, 14 # encoding: [0xf1,0x0b,0x76,0x10]
#CHECK-LE: xxaes192encp 8, 10, 14 # encoding: [0x10,0x76,0x0b,0xf1]
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