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[Mips] Fix mcpu flag with i6400/i6500 #161330

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Merged
merged 3 commits into from
Oct 13, 2025
+30 −4
Merged

[Mips] Fix mcpu flag with i6400/i6500 #161330

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0d63be9
[Mips] Fix mcpu flag with i6400/i6500
ArielCPU Sep 30, 2025
6c39322
Merge branch 'main' into users/arielcpu/mips-i6400-i6500-fix
ArielCPU Oct 12, 2025
d53174d
Merge branch 'main' into users/arielcpu/mips-i6400-i6500-fix
ArielCPU Oct 12, 2025
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7 changes: 4 additions & 3 deletions clang/lib/Basic/Targets/Mips.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ unsigned MipsTargetInfo::getISARev() const {
.Cases("mips32r2", "mips64r2", "octeon", "octeon+", 2)
.Cases("mips32r3", "mips64r3", 3)
.Cases("mips32r5", "mips64r5", "p5600", 5)
.Cases("mips32r6", "mips64r6", 6)
.Cases("mips32r6", "mips64r6", "i6400", "i6500", 6)
.Default(0);
}

Expand Down Expand Up @@ -270,8 +270,9 @@ bool MipsTargetInfo::validateTarget(DiagnosticsEngine &Diags) const {
return false;
}
// Mips revision 6 and -mfp32 are incompatible
if (FPMode != FP64 && FPMode != FPXX && (CPU == "mips32r6" ||
CPU == "mips64r6")) {
if (FPMode != FP64 && FPMode != FPXX &&
(CPU == "mips32r6" || CPU == "mips64r6" || CPU == "i6400" ||
CPU == "i6500")) {
Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfp32" << CPU;
return false;
}
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3 changes: 2 additions & 1 deletion clang/lib/Basic/Targets/Mips.h
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Expand Up @@ -83,7 +83,8 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
}

bool isIEEE754_2008Default() const {
return CPU == "mips32r6" || CPU == "mips64r6";
return CPU == "mips32r6" || CPU == "mips64r6" || CPU == "i6400" ||
CPU == "i6500";
}

enum FPModeEnum getDefaultFPMode() const {
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2 changes: 2 additions & 0 deletions clang/lib/Driver/ToolChains/Arch/Mips.cpp
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Expand Up @@ -442,6 +442,8 @@ bool mips::hasCompactBranches(StringRef &CPU) {
return llvm::StringSwitch<bool>(CPU)
.Case("mips32r6", true)
.Case("mips64r6", true)
.Case("i6400", true)
.Case("i6500", true)
.Default(false);
}

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22 changes: 22 additions & 0 deletions clang/test/Preprocessor/init-mips.c
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Expand Up @@ -1649,6 +1649,28 @@
// MIPS-ARCH-OCTEONP:#define __OCTEON__ 1
// MIPS-ARCH-OCTEONP:#define __mips_isa_rev 2

// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu i6400 < /dev/null \
// RUN: | FileCheck -match-full-lines -check-prefix MIPS-ARCH-I6400 %s
//
// MIPS-ARCH-I6400:#define _MIPS_ARCH "i6400"
// MIPS-ARCH-I6400:#define _MIPS_ARCH_I6400 1
// MIPS-ARCH-I6400:#define _MIPS_ISA _MIPS_ISA_MIPS64
// MIPS-ARCH-I6400:#define __mips_abs2008 1
// MIPS-ARCH-I6400:#define __mips_isa_rev 6
// MIPS-ARCH-I6400:#define __mips_nan2008 1

// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu i6500 < /dev/null \
// RUN: | FileCheck -match-full-lines -check-prefix MIPS-ARCH-I6500 %s
//
// MIPS-ARCH-I6500:#define _MIPS_ARCH "i6500"
// MIPS-ARCH-I6500:#define _MIPS_ARCH_I6500 1
// MIPS-ARCH-I6500:#define _MIPS_ISA _MIPS_ISA_MIPS64
// MIPS-ARCH-I6500:#define __mips_abs2008 1
// MIPS-ARCH-I6500:#define __mips_isa_rev 6
// MIPS-ARCH-I6500:#define __mips_nan2008 1

// Check MIPS float ABI macros
//
// RUN: %clang_cc1 -E -dM -ffreestanding \
Expand Down