[clang][Driver][HIP] Change OffloadingActionBuilder to respect the --no-gpu-bundle-output flag#161849

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MixedMatched wants to merge 56 commits intollvm:mainfrom

MixedMatched:respect-no-gpu-bundle

Commits on Oct 2, 2025

[clang][Driver][HIP] Change OffloadingActionBuilder to respect the --no-gpu-bundle-output flag
MixedMatched
committed

Commits on Oct 3, 2025

[mlir][vector] Simplify op rewrite pattern inheriting constructors. NFC. (#161670)

kuhar
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[NFC][IR2Vec] Moving `parseVocabSection()` to `VocabStorage` (#161711)

svkeerthy
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[X86][AMX] Combine constant zero vector and AMX cast to tilezero (#92384)

phoebewang
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[orc-rt] Add CallableTraitsHelper, refactor WrapperFunction to use it. (#161761)

lhames
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[orc-rt] Refactor WrapperFunction to simplify Serializer classes. (#161763)

lhames
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[clang] fix lambda dependency issue with late parse attributes (#161765)

mizvekov
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[orc-rt] Add transparent SPS conversion for error/expected types. (#161768)

lhames
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[RISCV][GISel] Use relaxed_load/store in GISel atomic patterns. NFC (#161712)

topperc
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[clang] fix #161765 test triple dependency (#161769)

mizvekov
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[flang] use specialized scan/verify version for char (#161767)

c8ef
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[JITLink] Add LinkGraph name / triple to debugging output. (#161772)

lhames
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[Clang] Ensure initialized NTTP expressions when building CTAD for type aliases (#161035)

zyn0217
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[X86] combineBitcastvxi1 - bail out on soft-float targets (#161704)

RKSimon
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[ARM] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158070)

AZero13
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[AMDGPU] Define VS_128*. NFCI (#161798)

rampitec
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[Clang] Normalize constraints before checking for satisfaction (#161671)

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[llvm-jitlink] Use MachOObjectFile::getArchTriple for triple identifi… (#161799)

lhames
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[BOLT] Add GNUPropertyRewriter and warn on AArch64 BTI note (#161206)

bgergely0
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[gn build] Port 441f0c7c9a5e

llvmgnsyncbot
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[AMDGPU] Account for implicit XCNT insertion (#160812)

easyonaadit
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[BOLT][AArch64] Refuse to run CDSplit pass (#159351)

paschalis-mpeis
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[VPlan] Deref VPlanPtr when passing to transform (NFC) (#161369)

artagnon
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[llvm][ELF]Add Shdr check for getBuildID (#126537)

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[AArch64] Refactor and refine cost-model for partial reductions (#158641)

sdesmalen-arm
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[flang][debug] Avoid redundant module info. (#161542)

abidh
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[gn build] Port 5cd3db3bed62

llvmgnsyncbot
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[X86][GlobalIsel] Enable gisel run for fpclass isel (#160741)

mahesh-attarde
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[X86][GlobalIsel] Adds support for G_UMIN/G_UMAX/G_SMIN/G_SMAX (#161783)

mahesh-attarde
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[GVN] Teach GVN simple masked load/store forwarding (#157689)

MDevereau
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[AArch64][SME] Enable `aarch64-split-sve-objects` with hazard padding (#161714)

MacDue
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[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in ElementwiseOpFusion.cpp (NFC)

joker-eph
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[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in mlir-rewrite.cpp (NFC)

joker-eph
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[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in PassGenTest.cpp (NFC)

joker-eph
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[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in Rewrite.cpp (NFC)

joker-eph
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[NFC][AMDGPU] Replace size & set_is_subset by operator== (#161813)

jmmartinez
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Revert "[PATCH] offload-tunnel-cmake with proper escape" (#161727)

ronlieb
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[NFC][LLVM][IR] Fix namespace usage in several files (#161756)

jurahul
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AMDGPU: Remove dead code trying to constrain a physical register (#161790)

arsenm
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AMDGPU: Stop trying to constrain register class of post-RA-pseudos (#161792)

arsenm
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AMDGPU: Fix trying to constrain physical registers in spill handling (#161793)

arsenm
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AMDGPU: Fix constrain register logic for physregs (#161794)

arsenm
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CodeGen: Stop checking for physregs in constrainRegClass (#161795)

arsenm
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[SPARC] Prevent meta instructions from being inserted into delay slots (#161111)

koachan
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[clang] [Headers] Don't use unreserved names in avx10_2bf16intrin.h (#161824)

mstorsjo
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[OpenACC][CIR] Impl reduction recipe pointer/array bound lowering (#161726)

erichkeane
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[flang] Simplify hlfir.index in a few limited cases. (#161558)

valerydmit
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[mlir][NFC] Remove redundant insertion point changes (#161837)

zero9178
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[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow element extraction/insertion intrinsics to be used in constexpr #159753 (#161302)

AdityaC4
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[analyzer][NFC] Simplify Analysis/csv2json.py (#161665)

steakhal
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[AMDGPU][Disassembler] Use target feature for `.amdhsa_reserve_xnack_mask` instead of hard code zero (#161771)

shiltian
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[LLVM] Add GNU make jobserver support (#145131)

yxsamliu
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Allow DW_OP_rot, DW_OP_neg, and DW_OP_abs in DIExpression (#160757)

tromey
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[LAA] Check if Ptr can be freed between Assume and CtxI. (#161725)

fhahn
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[Flang] Add standalone tile support (#160298)

Meinersbur
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[X86] Fold ADD(x,x) -> X86ISD::VSHLI(x,1) (#161843)

RKSimon
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